MICRO 7Pub Date : 1974-09-30DOI: 10.1145/800118.803870
S. Hyder, V. Ung, J. Vignes
{"title":"A firmware organization for minimal error evaluation in numerical computations","authors":"S. Hyder, V. Ung, J. Vignes","doi":"10.1145/800118.803870","DOIUrl":"https://doi.org/10.1145/800118.803870","url":null,"abstract":"The use of numerical arithmetic developed for general use in continuous space, on computers where numerical values are represented by a finite number of significant digits leads to errors that tend degenerate as computing progresses. The principle of the permutation-perturbation method is that, while in algebra a given algorithm provides a single result r, the same algorithm carried out on a computer provides a set R of numerical results that are all representative of the exact algebraic result r. The perturbation procedure acts on the data and result of each elementary operation, and the permutation acts on the order on which operations are carried out. A statistical procedure is used to generate r and its accuracy from a few elements of the set R. In practice the method consists in adding (or not adding) a bit in low order position of each operand and the partial and final results of a computation. The permutation procedure consists in permuting (or not) the non-associative operators in the algorithm. The software simulation of the P-P algorithm has given excellent results. We describe in this paper our approach towards incorporating this concept as a microprogrammed module. It is expected that the study will be a step towards a machine structure that will yield an evaluation of the error together with the numerical results of an algorithm.","PeriodicalId":248525,"journal":{"name":"MICRO 7","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1974-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116801805","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
MICRO 7Pub Date : 1974-09-30DOI: 10.1145/800118.803834
Sanford K. S. Ma, L. L. Wear
{"title":"Dynamic instruction set evaluation","authors":"Sanford K. S. Ma, L. L. Wear","doi":"10.1145/800118.803834","DOIUrl":"https://doi.org/10.1145/800118.803834","url":null,"abstract":"The problems of determining the relative frequency of execution of instructions on a computer and finding the occurrences of patterns of instructions within programs have been investigated by a number of researchers in the past. The method most often used was to examine the object code and apply a method to count each type of instruction or group that constitutes a given pattern. Except for cases where special hardware has been added to the machine to perform the searching and accounting, most results have been based on the evaluation of the object code for a program on an offline basis. In this paper, a method is presented which allows the user to gather information concerning frequency counts of instructions while the program is executing, and also allow the user to specify sequences of instructions to be examined. Besides the enhanced accuracy this method offers over static methods of counting, it is also much faster and can also be used to monitor the performance of operating system programs such as loaders, compilers and supervisor routines.","PeriodicalId":248525,"journal":{"name":"MICRO 7","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1974-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121118155","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
MICRO 7Pub Date : 1974-09-30DOI: 10.1145/800118.803845
S. Habib
{"title":"Microprogrammed enhancements to higher level languages - an overview","authors":"S. Habib","doi":"10.1145/800118.803845","DOIUrl":"https://doi.org/10.1145/800118.803845","url":null,"abstract":"This paper traces the various explorations which have been made to demonstrate the performance improvements which can be obtained by implementing the compiling, translation and execution of higher level languages. In most instances computer architecture is based on instruction set design and much of the high level language implementation is done by software compiling into the instruction set of the machine.\u0000 During the mid-1960's, several papers dealt with language performance improvements for FORTRAN or ALGOL machines. These discussions generally restricted themselves to a narrow problem in the entire spectrum of compilation problems. None address microprogrammed implementation of I/O functions for example. More recently we see the use of microprogram architecture for special purpose processors such as Fast Fourier Transform machines or array processors; speed ups for basic functions such as arithmetic calculations in Fortran.\u0000 With the possibility of microroutines to implement basic functions, there was a renewed interest in the Interpretive processes. This points up the need for a high level microprogramming language. We discuss some of the work done in this area. The area which has not yet been fully addressed is to what extent one can utilize microprogram architecture for basic design of an effective high level language machine. In this paper we will outline the earlier work vis a vis language enhancements and then suggest the areas which must be further explored.","PeriodicalId":248525,"journal":{"name":"MICRO 7","volume":"216 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1974-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127513190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
MICRO 7Pub Date : 1974-09-30DOI: 10.1145/800118.803857
Gordon Matheson
{"title":"User microprogrammability in the HP-21MX minicomputer","authors":"Gordon Matheson","doi":"10.1145/800118.803857","DOIUrl":"https://doi.org/10.1145/800118.803857","url":null,"abstract":"The design of a versatile and economical microprogrammable minicomputer is discussed, as embodied in the new HP-21MX computer family. These machines emulate the 2100 line efficiently, yet have a powerful microcode which allows ease of user-microprogramming. 3K words of Control Store addressing space are available for adding special HP firmware options and/or user-generated machine instructions. Some topics to be discussed are: Basic processor organization; Minimization of user concern over processor timing conflict; Interaction with special features such as interrupts, memory protection, and direct memory accesses by the I/O system; Translation of machine instructions into Control Store routine addresses; Organization and execution of microinstructions; Tools available to the user for microprogram development and implementation into ROM or Writeable Control Store.","PeriodicalId":248525,"journal":{"name":"MICRO 7","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1974-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122992348","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
MICRO 7Pub Date : 1974-09-30DOI: 10.1145/800118.803833
J. Tartar, S. Dasgupta
{"title":"A probabilistic model for the evaluation of microprogram performance","authors":"J. Tartar, S. Dasgupta","doi":"10.1145/800118.803833","DOIUrl":"https://doi.org/10.1145/800118.803833","url":null,"abstract":"This paper reports the development of a probabilistic model of microprogram behavior and the application of this model to the measurement of some fundamental parameters of microprogram performance. The major parameters considered are: (a) the mean microinstruction reference time, (b) the degree of parallelism in microprograms, and (c) the effect of branch microinstructions on performance degradation. The execution of each independent machine instruction invokes a specific sequence of microinstructions from the corresponding microprogram. It is shown that for a specific class of microprograms, the above parameters may be quantitatively determined, given the probabilities of machine instructions, and the conditional probabilities of the microinstruction sequence corresponding to a particular machine instruction. Examples are given for some representative machine instructions.","PeriodicalId":248525,"journal":{"name":"MICRO 7","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1974-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128402922","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
MICRO 7Pub Date : 1974-09-30DOI: 10.1145/800118.803873
J. Bondi, P. Stigall
{"title":"Designing HMO, an integrated hardware microcode optimizer","authors":"J. Bondi, P. Stigall","doi":"10.1145/800118.803873","DOIUrl":"https://doi.org/10.1145/800118.803873","url":null,"abstract":"This paper discusses an algorithm for optimizing the density and parallelism of microcoded routines in microprogrammable machines. Besides the algorithm itself, the algorithm's uses, design integration problems, architectural requirements, and adaptability to conventional machine characteristics are also discussed and analyzed. Even though the paper proposes a hardware implementation of the algorithm, the algorithm is viewed as an integral part of the entire microcode generation and usage process, from initial high-level input into a software microcode compiler down to machine-level execution of the resultant microcode on the host machine. It is believed that, by removing much of the traditionally time-consuming and machine-dependent microcode optimization from the software portion of this process, the algorithm can improve the overall process.","PeriodicalId":248525,"journal":{"name":"MICRO 7","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1974-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129653494","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
MICRO 7Pub Date : 1974-09-30DOI: 10.1145/800118.803871
Stephen L. Squires
{"title":"Microprogrammed operations for a three-value logic simulator","authors":"Stephen L. Squires","doi":"10.1145/800118.803871","DOIUrl":"https://doi.org/10.1145/800118.803871","url":null,"abstract":"This paper describes an application of microprogramming to improve the performance of the three-value simulation part of a logic design verification system. Emphasis is placed on developing a theory of computing three-value logic functions in such a way that independent identical functions may be computed in parallel. As a result, it is possible to simulate a number of nearly identical machines simultaneously.\u0000 The following is a summary of the main sections:\u0000 Section 0 defines the notation.\u0000 Section 1 defines the problem of computing three-value logic functions.\u0000 Section 2 gives a solution to the problem in terms of the normal Boolean functions and one auxiliary function.\u0000 Section 3 gives several algorithms for computing the auxiliary function in terms of various sets of functions which may be interpreted as machine instruction sets.\u0000 Section 4 extends the results to compute independent identical functions which may be used in the simulation of nearly identical machines.\u0000 Section 5 gives examples of implementations on various microprogrammed machines.\u0000 The theoretical results are currently being applied to an existing and heavily used design automation system. This work represents one of a number of studies being carried out to utilize microprogrammed processors as a means of constructing special purpose computing facilities.","PeriodicalId":248525,"journal":{"name":"MICRO 7","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1974-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130977495","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
MICRO 7Pub Date : 1974-09-30DOI: 10.1145/800118.803853
J. Wilkes
{"title":"Application of microprogramming to medium scale computer design","authors":"J. Wilkes","doi":"10.1145/800118.803853","DOIUrl":"https://doi.org/10.1145/800118.803853","url":null,"abstract":"The concept of microprogrammable architectures can provide the system designer with a powerful development tool. This paper describes the development process of a medium scale computer system, using a specific microprogrammable processor. The hardware architecture used in this system is referred to as the MPP (microprogrammable processor) while the resulting computer system is referred to as the MP-60.\u0000 The MPP hardware was designed to accomplish two primary goals; to shorten the lead time for computer system development by establishing a set of hardware building blocks, and to provide a mechanism for computer system emulation.","PeriodicalId":248525,"journal":{"name":"MICRO 7","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1974-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134479988","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
MICRO 7Pub Date : 1974-09-30DOI: 10.1145/800118.803852
F. Dromard
{"title":"Design of a microprogrammed alphanumeric terminal","authors":"F. Dromard","doi":"10.1145/800118.803852","DOIUrl":"https://doi.org/10.1145/800118.803852","url":null,"abstract":"The development of LSI microprocessors in terminal controllers enables tasks decentralization and increases the terminal performances for a lower cost. This paper describes a small alphanumeric display giving the user the opportunity of programming in a high level language, in a conversational mode. The microprocessor manages: the control of the keyboard, the display of the current sentence, the exchanges with the main computer. It also controls a syntactic filtering of the user's sentence. The keyboard is composed of alphanumeric and function keys. The alphanumeric text is not processed, while function keys are considered as delimiters. Each keyword of the language is assigned a keyboard position. The microprocessor has a grammar defining the syntactic rules; the processor generates a coded string corresponding to the sentence. This will be transmitted only if the sentence is correct. The user can modify at any instant the elements of his sentence. The terminal performances can be extended to several languages. To change the language, one has only to replace the grammar and the corresponding microprograms. These ones, such as the grammar, can either be resident or they are sent by the main computer, according to the requirements.","PeriodicalId":248525,"journal":{"name":"MICRO 7","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1974-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116287431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
MICRO 7Pub Date : 1974-09-30DOI: 10.1145/800118.803842
R. Hartenstein
{"title":"Microprogramming concepts - a step towards structured hardware design","authors":"R. Hartenstein","doi":"10.1145/800118.803842","DOIUrl":"https://doi.org/10.1145/800118.803842","url":null,"abstract":"In microprogrammable systems a special type of interpretive linkage mechanism is used. This linkage mechanism, among all known interpretive techniques, shows the clearest distinction between linkage implementation and the execution mechanisms of semantics. The essentials of interpretation by micro programs may be used as part of a design guideline for the design of a variety of multi processor systems or multi micro processor systems, aiming hereby at more clearly structured design solutions.\u0000 After a short discussion of the interpretive mechanisms, known from microprogrammable systems, its possible impact on the design philosophies for hardware design in computer architecture, and for integrated hardware/software design efforts, is the subject of this paper. Especially one particular design philosophy, derived from the interpretive mechanism of microprogrammable systems, is discussed, which results in computer architectures in form of a hierarchy of interpretive modules. A few examples are mentioned.","PeriodicalId":248525,"journal":{"name":"MICRO 7","volume":"117 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1974-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116337312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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