The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems最新文献_第2页

CITTA: Cache Interference-aware Task Partitioning for Real-time Multi-core Systems 实时多核系统的缓存干扰感知任务划分

The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems Pub Date : 2020-05-29 DOI: 10.1145/3372799.3394367

Jun Xiao, A. D. Pimentel

引用次数: 7

Improving the Performance of WCET Analysis in the Presence of Variable Latencies 在可变延迟条件下改进WCET分析的性能

The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems Pub Date : 2020-05-29 DOI: 10.1145/3372799.3394371

Z. Bai, H. Cassé, M. D. Michiel, Thomas Carle, Christine Rochange

引用次数: 5

Intermittent Computing with Peripherals, Formally Verified 带有外设的间歇计算，正式验证

The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems Pub Date : 2020-05-29 DOI: 10.1145/3372799.3394365

Gautier Berthou, Pierre-Évariste Dagand, Delphine Demange, Rémi Oudin, T. Risset

引用次数: 14

Towards Building Better Mobile Web Browsers for Ad Blocking: The Energy Perspective (WiP Paper) 构建更好的广告拦截移动浏览器:能源视角(WiP论文)

The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems Pub Date : 2020-05-29 DOI: 10.1145/3372799.3394372

Nadja Heitmann, B. Pirker, Sangyoung Park, S. Chakraborty

引用次数: 4

Path Sensitive Signatures for Control Flow Error Detection 用于控制流错误检测的路径敏感签名

The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems Pub Date : 2020-05-29 DOI: 10.1145/3372799.3394360

Ze Zhang, Sunghyun Park, S. Mahlke

{"title":"Path Sensitive Signatures for Control Flow Error Detection","authors":"Ze Zhang, Sunghyun Park, S. Mahlke","doi":"10.1145/3372799.3394360","DOIUrl":"https://doi.org/10.1145/3372799.3394360","url":null,"abstract":"Transistors' performance has been improving by shrinking feature sizes, lowering voltage levels, and reducing noise margins. However, these changes also make transistors more vulnerable and susceptible to transient faults. As a result, transient fault protection has become a crucial aspect of designing reliable systems. According to previous research, it is about 2.5x harder to mask control flow errors than data flow errors, making control flow protection critical. In this paper, we present Path Sensitive Signatures (PaSS), a low overhead and high fault coverage software method to detect illegal control flows. PaSS targets off-the-shelf embedded systems and combines two different methods to detect control flow errors that incorrectly jump to both nearby and faraway locations. In addition, it provides a lightweight technique to protect inter-procedural control flow transfers including calls and returns. PaSS is evaluated on the SPEC2006 benchmarks. The experimental results demonstrate that with the same level of fault coverage, PaSS only incurs 15.5% average performance overhead compared to 64.7% overhead incurred by the traditional signature-based technique. PaSS can also further extend fault coverage by providing inter-procedural protection at an additional 3.6% performance penalty.","PeriodicalId":232907,"journal":{"name":"The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems","volume":"465 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122151986","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

A Collaborative Filtering Approach for the Automatic Tuning of Compiler Optimisations 编译器优化自动调优的协同过滤方法

The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems Pub Date : 2020-05-06 DOI: 10.1145/3372799.3394361

Stefano Cereda, G. Palermo, P. Cremonesi, Stefano Doni

{"title":"A Collaborative Filtering Approach for the Automatic Tuning of Compiler Optimisations","authors":"Stefano Cereda, G. Palermo, P. Cremonesi, Stefano Doni","doi":"10.1145/3372799.3394361","DOIUrl":"https://doi.org/10.1145/3372799.3394361","url":null,"abstract":"Selecting the right compiler optimisations has a severe impact on programs' performance. Still, the available optimisations keep increasing, and their effect depends on the specific program, making the task human intractable. Researchers proposed several techniques to search in the space of compiler optimisations. Some approaches focus on finding better search algorithms, while others try to speed up the search by leveraging previously collected knowledge. The possibility to effectively reuse previous compilation results inspired us toward the investigation of techniques derived from the Recommender Systems field. The proposed approach exploits previously collected knowledge and improves its characterisation over time. Differently from current state-of-the-art solutions, our approach is not based on performance counters but relies on Reaction Matching, an algorithm able to characterise programs looking at how they react to different optimisation sets. The proposed approach has been validated using two widely used benchmark suites, cBench and PolyBench, including 54 different programs. Our solution, on average, extracted 90% of the available performance improvement 10 iterations before current state-of-the-art solutions,which corresponds to 40% fewer compilations and performance tests to perform.","PeriodicalId":232907,"journal":{"name":"The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129124620","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Compiling Spiking Neural Networks to Neuromorphic Hardware 编译尖峰神经网络到神经形态硬件

The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems Pub Date : 2020-04-07 DOI: 10.1145/3372799.3394364

Shihao Song, Adarsha Balaji, Anup Das, Nagarajan Kandasamy, J. Shackleford

{"title":"Compiling Spiking Neural Networks to Neuromorphic Hardware","authors":"Shihao Song, Adarsha Balaji, Anup Das, Nagarajan Kandasamy, J. Shackleford","doi":"10.1145/3372799.3394364","DOIUrl":"https://doi.org/10.1145/3372799.3394364","url":null,"abstract":"Machine learning applications that are implemented with spike-based computation model, e.g., Spiking Neural Network (SNN), have a great potential to lower the energy consumption when executed on a neuromorphic hardware. How- ever, compiling and mapping an SNN to the hardware is challenging, especially when compute and storage resources of the hardware (viz. crossbars) need to be shared among the neurons and synapses of the SNN. We propose an approach to analyze and compile SNNs on resource-constrained neuromorphic hardware, providing guarantees on key performance metrics such as execution time and throughput. Our approach makes the following three key contributions. First, we propose a greedy technique to partition an SNN into clusters of neurons and synapses such that each cluster can fit on to the resources of a crossbar. Second, we exploit the rich semantics and expressiveness of Synchronous Dataflow Graphs (SDFGs) to represent a clustered SNN and analyze its performance using Max-Plus Algebra, considering the available compute and storage capacities, buffer sizes, and communication bandwidth. Third, we propose a self-timed execution-based fast technique to compile and admit SNN-based applications to a neuromorphic hardware at run-time, adapting dynamically to the available resources on the hard- ware. We evaluate our approach with standard SNN-based applications and demonstrate a significant performance improvement compared to current practices.","PeriodicalId":232907,"journal":{"name":"The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-04-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121934884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 36

The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems 第21届ACM SIGPLAN/SIGBED嵌入式系统语言、编译器和工具会议

The 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems Pub Date : 1900-01-01 DOI: 10.5555/3403484

引用次数: 0