Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation最新文献_第3页

Machine-verified network controllers 机器验证的网络控制器

Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation Pub Date : 2013-06-16 DOI: 10.1145/2491956.2462178

Arjun Guha, Mark Reitblatt, Nate Foster

{"title":"Machine-verified network controllers","authors":"Arjun Guha, Mark Reitblatt, Nate Foster","doi":"10.1145/2491956.2462178","DOIUrl":"https://doi.org/10.1145/2491956.2462178","url":null,"abstract":"In many areas of computing, techniques ranging from testing to formal modeling to full-blown verification have been successfully used to help programmers build reliable systems. But although networks are critical infrastructure, they have largely resisted analysis using formal techniques. Software-defined networking (SDN) is a new network architecture that has the potential to provide a foundation for network reasoning, by standardizing the interfaces used to express network programs and giving them a precise semantics. This paper describes the design and implementation of the first machine-verified SDN controller. Starting from the foundations, we develop a detailed operational model for OpenFlow (the most popular SDN platform) and formalize it in the Coq proof assistant. We then use this model to develop a verified compiler and run-time system for a high-level network programming language. We identify bugs in existing languages and tools built without formal foundations, and prove that these bugs are absent from our system. Finally, we describe our prototype implementation and our experiences using it to build practical applications.","PeriodicalId":224397,"journal":{"name":"Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114990782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 111

SPLLIFT: statically analyzing software product lines in minutes instead of years SPLLIFT:在几分钟内静态分析软件产品线，而不是几年

Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation Pub Date : 2013-06-16 DOI: 10.1145/2491956.2491976

E. Bodden, T. Tolêdo, Márcio Ribeiro, Claus Brabrand, Paulo Borba, M. Mezini

{"title":"SPLLIFT: statically analyzing software product lines in minutes instead of years","authors":"E. Bodden, T. Tolêdo, Márcio Ribeiro, Claus Brabrand, Paulo Borba, M. Mezini","doi":"10.1145/2491956.2491976","DOIUrl":"https://doi.org/10.1145/2491956.2491976","url":null,"abstract":"A software product line (SPL) encodes a potentially large variety of software products as variants of some common code base. Up until now, re-using traditional static analyses for SPLs was virtually intractable, as it required programmers to generate and analyze all products individually. In this work, however, we show how an important class of existing inter-procedural static analyses can be transparently lifted to SPLs. Without requiring programmers to change a single line of code, our approach SPLLIFT automatically converts any analysis formulated for traditional programs within the popular IFDS framework for inter-procedural, finite, distributive, subset problems to an SPL-aware analysis formulated in the IDE framework, a well-known extension to IFDS. Using a full implementation based on Heros, Soot, CIDE and JavaBDD, we show that with SPLLIFT one can reuse IFDS-based analyses without changing a single line of code. Through experiments using three static analyses applied to four Java-based product lines, we were able to show that our approach produces correct results and outperforms the traditional approach by several orders of magnitude.","PeriodicalId":224397,"journal":{"name":"Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130250893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 115

Fast RMWs for TSO: semantics and implementation TSO的快速rmw:语义和实现

Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation Pub Date : 2013-06-16 DOI: 10.1145/2491956.2462196

Bharghava Rajaram, V. Nagarajan, Susmit Sarkar, M. Elver

{"title":"Fast RMWs for TSO: semantics and implementation","authors":"Bharghava Rajaram, V. Nagarajan, Susmit Sarkar, M. Elver","doi":"10.1145/2491956.2462196","DOIUrl":"https://doi.org/10.1145/2491956.2462196","url":null,"abstract":"Read-Modify-Write (RMW) instructions are widely used as the building blocks of a variety of higher level synchronization constructs, including locks, barriers, and lock-free data structures. Unfortunately, they are expensive in architectures such as x86 and SPARC which enforce (variants of) Total-Store-Order (TSO). A key reason is that RMWs in these architectures are ordered like a memory barrier, incurring the cost of a write-buffer drain in the critical path. Such strong ordering semantics are dictated by the requirements of the strict atomicity definition (type-1) that existing TSO RMWs use. Programmers often do not need such strong semantics. Besides, weakening the atomicity definition of TSO RMWs, would also weaken their ordering -- thereby leading to more efficient hardware implementations. In this paper we argue for TSO RMWs to use weaker atomicity definitions -- we consider two weaker definitions: type-2 and type-3, with different relaxed ordering differences. We formally specify how such weaker RMWs would be ordered, and show that type-2 RMWs, in particular, can seamlessly replace existing type-1 RMWs in common synchronization idioms -- except in situations where a type-1 RMW is used as a memory barrier. Recent work has shown that the new C/C++11 concurrency model can be realized by generating conventional (type-1) RMWs for C/C++11 SC-atomic-writes and/or SC-atomic-reads. We formally prove that this is equally valid using the proposed type-2 RMWs; type-3 RMWs, on the other hand, could be used for SC-atomic-reads (and optionally SC-atomic-writes). We further propose efficient microarchitectural implementations for type-2 (type-3) RMWs -- simulation results show that our implementation reduces the cost of an RMW by up to 58.9% (64.3%), which translates into an overall performance improvement of up to 9.0% (9.2%) on a set of parallel programs, including those from the SPLASH-2, PARSEC, and STAMP benchmarks.","PeriodicalId":224397,"journal":{"name":"Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122686062","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Dynamic determinacy analysis 动态确定性分析

Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation Pub Date : 2013-06-16 DOI: 10.1145/2491956.2462168

Max Schäfer, Manu Sridharan, Julian T Dolby, F. Tip

引用次数: 69

Fast algorithms for Dyck-CFL-reachability with applications to alias analysis 快速算法dyck - cfl可达性与应用程序别名分析

Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation Pub Date : 2013-06-16 DOI: 10.1145/2491956.2462159

Qirun Zhang, M. Lyu, Hao Yuan, Z. Su

{"title":"Fast algorithms for Dyck-CFL-reachability with applications to alias analysis","authors":"Qirun Zhang, M. Lyu, Hao Yuan, Z. Su","doi":"10.1145/2491956.2462159","DOIUrl":"https://doi.org/10.1145/2491956.2462159","url":null,"abstract":"The context-free language (CFL) reachability problem is a well-known fundamental formulation in program analysis. In practice, many program analyses, especially pointer analyses, adopt a restricted version of CFL-reachability, Dyck-CFL-reachability, and compute on edge-labeled bidirected graphs. Solving the all-pairs Dyck-CFL-reachability on such bidirected graphs is expensive. For a bidirected graph with n nodes and m edges, the traditional dynamic programming style algorithm exhibits a subcubic time complexity for the Dyck language with k kinds of parentheses. When the underlying graphs are restricted to bidirected trees, an algorithm with O(n log n log k) time complexity was proposed recently. This paper studies the Dyck-CFL-reachability problems on bidirected trees and graphs. In particular, it presents two fast algorithms with O(n) and O(n + m log m) time complexities on trees and graphs respectively. We have implemented and evaluated our algorithms on a state-of-the-art alias analysis for Java. Results on standard benchmarks show that our algorithms achieve orders of magnitude speedup and consume less memory.","PeriodicalId":224397,"journal":{"name":"Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125258989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 66

CLAP: recording local executions to reproduce concurrency failures CLAP:记录本地执行以重现并发失败

Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation Pub Date : 2013-06-16 DOI: 10.1145/2491956.2462167

Jeff Huang, Charles Zhang, Julian T Dolby

{"title":"CLAP: recording local executions to reproduce concurrency failures","authors":"Jeff Huang, Charles Zhang, Julian T Dolby","doi":"10.1145/2491956.2462167","DOIUrl":"https://doi.org/10.1145/2491956.2462167","url":null,"abstract":"We present CLAP, a new technique to reproduce concurrency bugs. CLAP has two key steps. First, it logs thread local execution paths at runtime. Second, offline, it computes memory dependencies that accord with the logged execution and are able to reproduce the observed bug. The second step works by combining constraints from the thread paths and constraints based on a memory model, and computing an execution with a constraint solver. CLAP has four major advantages. First, logging purely local execution of each thread is substantially cheaper than logging memory interactions, which enables CLAP to be efficient compared to previous approaches. Second, our logging does not require any synchronization and hence with no added memory barriers or fences; this minimizes perturbation and missed bugs due to extra synchronizations foreclosing certain racy behaviors. Third, since it uses no synchronization, we extend CLAP to work on a range of relaxed memory models, such as TSO and PSO, in addition to sequential consistency. Fourth, CLAP can compute a much simpler execution than the original one, that reveals the bug with minimal thread context switches. To mitigate the scalability issues, we also present an approach to parallelize constraint solving, which theoretically scales our technique to programs with arbitrary execution length. Experimental results on a variety of multithreaded benchmarks and real world concurrent applications validate these advantages by showing that our technique is effective in reproducing concurrency bugs even under relaxed memory models; furthermore, it is significantly more efficient than a state-of-the-art technique that records shared memory dependencies, reducing execution time overhead by 45% and log size by 88% on average.","PeriodicalId":224397,"journal":{"name":"Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122033440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 129

Session details: Synthesis 会话细节:

Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation Pub Date : 2013-06-16 DOI: 10.1145/3245325

Martin T. Vechev

引用次数: 0

Reasoning about nondeterminism in programs 关于程序中不确定性的推理

Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation Pub Date : 2013-06-16 DOI: 10.1145/2491956.2491969

B. Cook, Eric Koskinen

{"title":"Reasoning about nondeterminism in programs","authors":"B. Cook, Eric Koskinen","doi":"10.1145/2491956.2491969","DOIUrl":"https://doi.org/10.1145/2491956.2491969","url":null,"abstract":"Branching-time temporal logics (e.g. CTL, CTL*, modal mu-calculus) allow us to ask sophisticated questions about the nondeterminism that appears in systems. Applications of this type of reasoning include planning, games, security analysis, disproving, precondition synthesis, environment synthesis, etc. Unfortunately, existing automatic branching-time verification tools have limitations that have traditionally restricted their applicability (e.g. push-down systems only, universal path quantifiers only, etc). In this paper we introduce an automation strategy that lifts many of these previous restrictions. Our method works reliably for properties with non-trivial mixtures of universal and existential modal operators. Furthermore, our approach is designed to support (possibly infinite-state) programs. The basis of our approach is the observation that existential reasoning can be reduced to universal reasoning if the system's state-space is appropriately restricted. This restriction on the state-space must meet a constraint derived from recent work on proving non-termination. The observation leads to a new route for implementation based on existing tools. To demonstrate the practical viability of our approach, we report on the results applying our preliminary implementation to a set of benchmarks drawn from the Windows operating system, the PostgreSQL database server, SoftUpdates patching system, as well as other hand-crafted examples.","PeriodicalId":224397,"journal":{"name":"Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129022903","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 48

Reconciling exhaustive pattern matching with objects 与对象协调详尽模式匹配

Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation Pub Date : 2013-06-16 DOI: 10.1145/2491956.2462194

Chinawat Isradisaikul, A. Myers

引用次数: 1

Hybrid context-sensitivity for points-to analysis 用于点到分析的混合上下文敏感性

Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation Pub Date : 2013-06-16 DOI: 10.1145/2491956.2462191

George Kastrinis, Y. Smaragdakis

引用次数: 174