7th IEEE International Symposium on Industrial Embedded Systems (SIES'12)最新文献

Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switching 具有严格优先级和AVB交换的以太网拓扑的正式最坏时序分析

7th IEEE International Symposium on Industrial Embedded Systems (SIES'12) Pub Date : 2012-06-20 DOI: 10.1109/SIES.2012.6356564

Jonas Diemer, Daniel Thiele, R. Ernst

{"title":"Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switching","authors":"Jonas Diemer, Daniel Thiele, R. Ernst","doi":"10.1109/SIES.2012.6356564","DOIUrl":"https://doi.org/10.1109/SIES.2012.6356564","url":null,"abstract":"Ethernet is increasingly recognized as the future communication standard for distributed embedded systems in multiple domains such as industrial automation, automotive and avionics. A main motivation for this is cost and available data rate. A critical issue in the adoption of Ethernet in these domains is the timing of frame transfers, as many relevant applications require a guaranteed low-latency communication in order to meet real-time constraints. Ethernet AVB is an upcoming standard which addresses the timing issues by extending the existing strict-priority arbitration. Still, it needs to be evaluated whether these mechanism suffice for the targeted applications. For safety-critical applications, this can not only be done using intuition or simulation but requires a formal approach to assure the coverage of all worst-case corner cases. Hence, we present in this paper a formal worst-case analysis of the timing properties of Ethernet AVB and strict-priority Ethernet. This analysis mathematically determines safe upper bounds on the latency of frame transfers. Using this approach, we evaluate different topologies for a typical use-case in industrial automation.","PeriodicalId":219258,"journal":{"name":"7th IEEE International Symposium on Industrial Embedded Systems (SIES'12)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117061547","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 100

Fine-grained timing and control flow error checking for hard real-time task execution 用于硬实时任务执行的细粒度定时和控制流错误检查

7th IEEE International Symposium on Industrial Embedded Systems (SIES'12) Pub Date : 2012-06-20 DOI: 10.1109/SIES.2012.6356592

Julian Wolf, Bernhard Fechner, S. Uhrig, T. Ungerer

{"title":"Fine-grained timing and control flow error checking for hard real-time task execution","authors":"Julian Wolf, Bernhard Fechner, S. Uhrig, T. Ungerer","doi":"10.1109/SIES.2012.6356592","DOIUrl":"https://doi.org/10.1109/SIES.2012.6356592","url":null,"abstract":"Robustness and reliability are essential requirements of today's embedded systems. Especially errors in the control flow of a program, e.g. caused by transient errors, may lead to a faulty system behavior potentially with catastrophic consequences. Several methods for control flow checking have been proposed during the last decades. However, these techniques mostly focus on a correct sequence of application parts but not on the correct timing behavior of the control flow, which is essential for hard real-time systems. In this paper, we present a new approach which introduces fine-grained on-line timing checks for hard real-time systems combined with a lightweight control flow monitoring technique. The proposed approach is a hybrid hardware-software technique: We instrument the application code at compile-time by adding checkpoints, which contain temporal and logical information of the control flow. During run-time, a small hardware check unit connected to the core reads the instrumented data in order to verify the correctness of the application's control flow and timing behavior. The finegrained functionality of our mechanism allows a detection of many transient errors, associated with very low detection latency. It is no longer necessary to redundantly execute code in order to monitor anomalies. The hardware overhead is limited to a small check unit (only 0.5 % of chip space compared to the processor core); according to experimental results, the execution time overhead is only 10.6 % in the average case while the memory overhead is 12.3 %.","PeriodicalId":219258,"journal":{"name":"7th IEEE International Symposium on Industrial Embedded Systems (SIES'12)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122374871","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

Towards resource sharing under multiprocessor semi-partitioned scheduling 多处理器半分区调度下的资源共享研究

7th IEEE International Symposium on Industrial Embedded Systems (SIES'12) Pub Date : 2012-06-20 DOI: 10.1109/SIES.2012.6356605

Sara Afshar, Farhang Nemati, Thomas Nolte

引用次数: 8

LISPARC: Using an architecture description language approach for modelling an adaptive processor microarchitecture LISPARC:使用体系结构描述语言方法对自适应处理器微体系结构进行建模

7th IEEE International Symposium on Industrial Embedded Systems (SIES'12) Pub Date : 2012-06-20 DOI: 10.1109/SIES.2012.6356596

Carsten Tradowsky, F. Thoma, M. Hübner, J. Becker

引用次数: 6

Scalable virtual prototyping of distributed embedded control in a modern elevator system 现代电梯系统中分布式嵌入式控制的可扩展虚拟样机

7th IEEE International Symposium on Industrial Embedded Systems (SIES'12) Pub Date : 2012-06-20 DOI: 10.1109/SIES.2012.6356593

A. Ferrari, Marco Carloni, Alessandro Mignogna, F. Menichelli, D. Ginsberg, E. Scholte, D. Nguyen

引用次数: 5

Response-time analysis of the flexray dynamic segment under consideration of slot-multiplexing 考虑时隙复用的柔性动态线段响应时间分析

7th IEEE International Symposium on Industrial Embedded Systems (SIES'12) Pub Date : 2012-06-20 DOI: 10.1109/SIES.2012.6356566

M. Neukirchner, Mircea Negrean, R. Ernst, Torsten T. Bone

{"title":"Response-time analysis of the flexray dynamic segment under consideration of slot-multiplexing","authors":"M. Neukirchner, Mircea Negrean, R. Ernst, Torsten T. Bone","doi":"10.1109/SIES.2012.6356566","DOIUrl":"https://doi.org/10.1109/SIES.2012.6356566","url":null,"abstract":"Driven by the increasing demand for high speed communication of the in-vehicle automotive systems, car manufacturers and suppliers have developed the FlexRay communication protocol. Being dedicated to safety and time-critical applications, the availability of appropriate timing analysis methods for the prediction of the FlexRay timing behaviour is essential. Consequently, several analysis solutions have been proposed. Due to the limitation in the number of frame identifiers in the FlexRay dynamic segment, the slot-multiplexing (or cycle-multiplexing) mechanism is gaining importance for realistic systems. This mechanism allows to share frame identifiers between messages. Moreover, cycle multiplexing in the dynamic segment is often used for signals with deadlines beyond the signal period. Despite its practical relevance, none of the existing response-time analysis approaches is able to consider slot-multiplexing in the dynamic segment for realistic configurations. In this paper we overcome limitations of previous work and present a more general approach for the response-time analysis of the FlexRay dynamic segment, which accurately takes slot-multiplexing into account. We illustrate the applicability of the proposed approach with an industrial case-study and synthetic testcases.","PeriodicalId":219258,"journal":{"name":"7th IEEE International Symposium on Industrial Embedded Systems (SIES'12)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129415853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

Design by uncertainty: Towards the use of measurement uncertainty in real-time systems 不确定度设计:在实时系统中使用测量不确定度

7th IEEE International Symposium on Industrial Embedded Systems (SIES'12) Pub Date : 2012-06-20 DOI: 10.1109/SIES.2012.6356595

Peter Ulbrich, Florian Franzmann, F. Scheler, Wolfgang Schröder-Preikschat

{"title":"Design by uncertainty: Towards the use of measurement uncertainty in real-time systems","authors":"Peter Ulbrich, Florian Franzmann, F. Scheler, Wolfgang Schröder-Preikschat","doi":"10.1109/SIES.2012.6356595","DOIUrl":"https://doi.org/10.1109/SIES.2012.6356595","url":null,"abstract":"Real-time systems usually incorporate a wide variety of challenges: A control engineer, for example, aims for the highest possible control quality achievable. Here, one key element is to minimise the uncertainty of the measurements. This, to put it simple, is the noise of sensor data, which has a negative effect on control. Although measurement uncertainty is well treated in control theory, it is usually ignored in common real-time architectures where temporal properties are the prevalent criteria. Consequently, the communication between control engineers and real-time specialists is rather one way, revolving around deadlines and sampling periods. However, on closer examination, many real-time properties are derived from the measurement uncertainty aspired by the control engineer. Conversely, temporal variations, virtually inevitable in practice, can be represented as measurement uncertainty as well. Tackling the measurement uncertainty should therefore be an interdisciplinary task: The control system respects the actual run-time conditions instead of estimating them. Likewise, the real-time system considers measurement uncertainty rather than blindly sticking to deadlines. In this paper we present an uncertainty-centric approach to leverage measurement uncertainty in real-time architectures, not only at design time but also at run-time. Using measurement uncertainty as an explicit interface minimises the gap between real-time specialists and control engineers and facilitates a modular and flexible system design. Our preliminary results are promising and show the ease of use and the applicability to existing systems.","PeriodicalId":219258,"journal":{"name":"7th IEEE International Symposium on Industrial Embedded Systems (SIES'12)","volume":"15 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130765019","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Automated Bio Cybernetic System: A Lab-on-Chip case study 自动化生物控制论系统:芯片实验室案例研究

7th IEEE International Symposium on Industrial Embedded Systems (SIES'12) Pub Date : 2012-06-20 DOI: 10.1109/SIES.2012.6356608

K. Wang, Z. Salcic, J. Yeh, J. Akagi, D. Wlodkowic

引用次数: 13

Implementing hierarchical scheduling on COTS Ethernet switches using a master/slave approach 在COTS以太网交换机上使用主/从方式实现分层调度

7th IEEE International Symposium on Industrial Embedded Systems (SIES'12) Pub Date : 2012-06-20 DOI: 10.1109/SIES.2012.6356572

Z. Iqbal, L. Almeida, R. Marau, M. Behnam, Thomas Nolte

引用次数: 16

Towards runtime adaptation in real-time, networked embedded systems 面向实时、网络化嵌入式系统的运行时适应

7th IEEE International Symposium on Industrial Embedded Systems (SIES'12) Pub Date : 2012-06-20 DOI: 10.1109/SIES.2012.6356594

C. Prehofer, M. Zeller

引用次数: 2