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2009 2nd International Workshop on Electron Devices and Semiconductor Technology最新文献

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Charge trapping property of RTN grown oxynitride films on strained-Si 应变si上RTN生长氮氧化物薄膜的电荷俘获特性
2009 2nd International Workshop on Electron Devices and Semiconductor Technology Pub Date : 2009-07-17 DOI: 10.1109/EDST.2009.5166134
B. Majhi, C. Mahata, M. K. Hota, S. Mallik, T. Das, C. Maiti
{"title":"Charge trapping property of RTN grown oxynitride films on strained-Si","authors":"B. Majhi, C. Mahata, M. K. Hota, S. Mallik, T. Das, C. Maiti","doi":"10.1109/EDST.2009.5166134","DOIUrl":"https://doi.org/10.1109/EDST.2009.5166134","url":null,"abstract":"Ultra thin (∼6–7nm) silicon-oxynitride films have been deposited on Strained-Si/Si<inf>0.8</inf>Ge<inf>0.2</inf> layers at high temperature of 900°C and 1000°C using rapid thermal nitridation in O<inf>2</inf>+N<inf>2</inf> ambient. The border trap (Q<inf>bt</inf>) generation using the hysteresis in high-frequency capacitance-voltage (C-V) characteristics under both constant current stressing (CCS) and constant voltage stressing (CVS) has been analyzed. It has been observed that the interface trap charge density (Dit) and hysteresis decrease in 1000°C RTN. It is also observed that the charge trapping behavior and the amount of border trap charge density are found to be low in the case of 1000°C RTN process.","PeriodicalId":219136,"journal":{"name":"2009 2nd International Workshop on Electron Devices and Semiconductor Technology","volume":"221 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122339177","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Micromachined piezoelectric acoustic device 微机械压电声学装置
2009 2nd International Workshop on Electron Devices and Semiconductor Technology Pub Date : 2009-06-01 DOI: 10.1109/EDST.2009.5166095
T. Ren, Hao Chen, Yi Yang, Yiping Zhu, D. Fu, Chao Wang, Xiaoming Wu, Jian Cai, Litian Liu, Zhi-Jian Li
{"title":"Micromachined piezoelectric acoustic device","authors":"T. Ren, Hao Chen, Yi Yang, Yiping Zhu, D. Fu, Chao Wang, Xiaoming Wu, Jian Cai, Litian Liu, Zhi-Jian Li","doi":"10.1109/EDST.2009.5166095","DOIUrl":"https://doi.org/10.1109/EDST.2009.5166095","url":null,"abstract":"Micromachined technology has been widely used to reduce device size and improve performance. In this paper, our research activities on micromachined piezoelectric acoustic devices at wide frequency range, from audio microphones to ultrasonic transducers, are reviewed. These devices are based on ferroelectric thin films, and exceed the conventional acoustic devices in excellent performance, miniaturized size, high reliability and compatibility with conventional integrated circuit fabrication. Resonance frequency can be determined by the thickness of each layer composing the thin film. Compact arrays of these devices are designed, fabricated and characterized to enhance sensitivity and pointing. Micromachined acoustic devices could find extensive applications in practical systems.","PeriodicalId":219136,"journal":{"name":"2009 2nd International Workshop on Electron Devices and Semiconductor Technology","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121581691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Fabrication and characterization of novel multiferroic cantilevers for microtransuducers 微传感器用新型多铁悬臂梁的制备与表征
2009 2nd International Workshop on Electron Devices and Semiconductor Technology Pub Date : 2009-06-01 DOI: 10.1109/EDST.2009.5166137
K. Prashanthi, M. Mandal, S. Duttagupta, R. Pinto, V. Palkar
{"title":"Fabrication and characterization of novel multiferroic cantilevers for microtransuducers","authors":"K. Prashanthi, M. Mandal, S. Duttagupta, R. Pinto, V. Palkar","doi":"10.1109/EDST.2009.5166137","DOIUrl":"https://doi.org/10.1109/EDST.2009.5166137","url":null,"abstract":"It is believed that new technologies tend to initiate with new materials and manufacturing processes, which are used for new products. Magnetoelectric multiferroics are the class of materials which have coexistence of magnetic and ferroelectric properties, with coupling between two order parameters. These materials therefore find novel applications in multiple memories apart from MEMS sensors and actuators. However, the research on these materials is not reached to technology level. The microfabrication technologies required for preparing device structures of these materials need extensive optimization. Patterning these films into the required structures can also be a challenge. This paper presents the first achievement towards the practical realization of MEMS devices of such novel promising material.","PeriodicalId":219136,"journal":{"name":"2009 2nd International Workshop on Electron Devices and Semiconductor Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115927794","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Study of random dopant fluctuation effects in fully depleted silicon on insulator MOSFET using analytical model 用解析模型研究全贫硅中随机掺杂波动对绝缘子MOSFET的影响
2009 2nd International Workshop on Electron Devices and Semiconductor Technology Pub Date : 2009-06-01 DOI: 10.1109/EDST.2009.5166108
R. Rao, G. Katti, N. Dasgupta, A. DasGupta
{"title":"Study of random dopant fluctuation effects in fully depleted silicon on insulator MOSFET using analytical model","authors":"R. Rao, G. Katti, N. Dasgupta, A. DasGupta","doi":"10.1109/EDST.2009.5166108","DOIUrl":"https://doi.org/10.1109/EDST.2009.5166108","url":null,"abstract":"The effect of random dopant fluctuation in the channel of a fully depleted SOI-MOSFET is investigated using analytical models for threshold voltage and subthreshold current. Analytical models are based on solving 2D Poisson's equation considering non-uniformly doped channel. Since analytical models are faster compared to numerical simulations, a large number of devices can be simulated.","PeriodicalId":219136,"journal":{"name":"2009 2nd International Workshop on Electron Devices and Semiconductor Technology","volume":"190 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134259939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Influence of SiN composition on program and erase characteristics of SANOS-type flash memories SiN组成对sanos型闪存程序和擦除特性的影响
2009 2nd International Workshop on Electron Devices and Semiconductor Technology Pub Date : 2009-06-01 DOI: 10.1109/EDST.2009.5166111
C. Sandhya, U. Ganguly, B. Apoorva, C. Olsen, S. Seutter, L. Date, R. Hung, J. Vasi, S. Mahapatra
{"title":"Influence of SiN composition on program and erase characteristics of SANOS-type flash memories","authors":"C. Sandhya, U. Ganguly, B. Apoorva, C. Olsen, S. Seutter, L. Date, R. Hung, J. Vasi, S. Mahapatra","doi":"10.1109/EDST.2009.5166111","DOIUrl":"https://doi.org/10.1109/EDST.2009.5166111","url":null,"abstract":"Composition of the silicon-nitride charge trap layer strongly impacts electron and hole trap properties. This significantly impacts charge trap flash memory performance and reliability. Important trade-offs between Program/Erase (P/E) levels (memory window) and retention loss is shown and critical trends identified. Increasing the Si-richness of the SiN layer improves memory window by increasing erase efficiency. E-state retention characteristics are improved but at the expense of higher P-state retention loss.","PeriodicalId":219136,"journal":{"name":"2009 2nd International Workshop on Electron Devices and Semiconductor Technology","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124519023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Wireless Sensor Network: Intricate modeling and analysis of CNT and MEMS based sensor nodes 无线传感器网络:基于碳纳米管和MEMS的传感器节点的复杂建模和分析
2009 2nd International Workshop on Electron Devices and Semiconductor Technology Pub Date : 2009-06-01 DOI: 10.1109/EDST.2009.5166129
Satyadhar Joshi, Rohit Pathak, Salman Ahmed
{"title":"Wireless Sensor Network: Intricate modeling and analysis of CNT and MEMS based sensor nodes","authors":"Satyadhar Joshi, Rohit Pathak, Salman Ahmed","doi":"10.1109/EDST.2009.5166129","DOIUrl":"https://doi.org/10.1109/EDST.2009.5166129","url":null,"abstract":"We have analyzed the effect of innovations in Nanotechnology on Wireless Sensor Networks (WSN) and have modeled Carbon Nanotube (CNT) and Micro-Electro-Mechanical Systems (MEMS) based sensor nodes. SUGAR library in MATLAB has been used to illustrate the static analysis of deflection, display the structure and to compute the displacement parameters of a cantilever beam subjected to an external force. A WSN (Wireless Sensor Network) model has been programmed using Simulink in MATLAB. We have shown the integration of CNT in WSN as CNT based sensors, microprocessors, batteries etc. A proposition is put forward by us on the changes needed in the existing sensor node structure to improve its efficiency and to facilitate and enhance the assimilation of CNT based devices in a WSN. We have shown the functioning of CNT based Nano devices in WSN technology. Finally we have commented on the challenges that exist in this technology and described the important factors that need to be kept under consideration for the calculation of the reliability of CNT based devices and their key effects on the WSN environment.","PeriodicalId":219136,"journal":{"name":"2009 2nd International Workshop on Electron Devices and Semiconductor Technology","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116169725","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Recent advances in charge trap flash memories 电荷阱闪存的最新进展
2009 2nd International Workshop on Electron Devices and Semiconductor Technology Pub Date : 2009-06-01 DOI: 10.1109/EDST.2009.5166101
C. Sandhya, P. K. Singh, Shashank Gupta, H. Rohra, M. Shivatheja, Udayan Ganguly, R. Hofmann, Gautam Mukhopadhyay, Suddhasatta Mahapatra, J. Vasi
{"title":"Recent advances in charge trap flash memories","authors":"C. Sandhya, P. K. Singh, Shashank Gupta, H. Rohra, M. Shivatheja, Udayan Ganguly, R. Hofmann, Gautam Mukhopadhyay, Suddhasatta Mahapatra, J. Vasi","doi":"10.1109/EDST.2009.5166101","DOIUrl":"https://doi.org/10.1109/EDST.2009.5166101","url":null,"abstract":"This paper reviews recent advances in Charge Trap Flash (CTF) memories. CTFs are predicted to replace the traditional floating-gate flash devices beyond the 32 nm node. The paper focuses on work done at IIT Bombay in the areas of both nitride-based SONOS devices as well as nanocrystal (NC)-based devices. For SONOS devices, results are presented for optimization of the nitride layer to obtain the best characteristics, and the simulation of the program/erase transients. For NC devices, experimental characteristics of single and dual layer cells, as well as simulation results are presented.","PeriodicalId":219136,"journal":{"name":"2009 2nd International Workshop on Electron Devices and Semiconductor Technology","volume":"37 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120839994","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Unified compact modeling for Bulk/SOI/FinFET/SiNW MOSFETs 块体/SOI/FinFET/SiNW mosfet的统一紧凑建模
2009 2nd International Workshop on Electron Devices and Semiconductor Technology Pub Date : 2009-06-01 DOI: 10.1109/EDST.2009.5166097
Xing Zhou, G. Zhu, G. H. See, Junbin Zhang, Shihuan Lin, Chengqing Wei, Zuhui Chen, M. Srikanth, Yafei Yan, R. Selvakumar, William Chandra
{"title":"Unified compact modeling for Bulk/SOI/FinFET/SiNW MOSFETs","authors":"Xing Zhou, G. Zhu, G. H. See, Junbin Zhang, Shihuan Lin, Chengqing Wei, Zuhui Chen, M. Srikanth, Yafei Yan, R. Selvakumar, William Chandra","doi":"10.1109/EDST.2009.5166097","DOIUrl":"https://doi.org/10.1109/EDST.2009.5166097","url":null,"abstract":"This paper describes seamless transitions among various MOS devices, ranging from bulk and partially/fully-depleted SOI to double-gate FinFETs and silicon-nanowire MOSFETs. The underlying governing equations for various structures are outlined, which provide the motivation for unifying MOS compact models with the unified regional modeling (URM) approach.","PeriodicalId":219136,"journal":{"name":"2009 2nd International Workshop on Electron Devices and Semiconductor Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128570611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Modified surface potential based current modeling of thin silicon channel double gate SOI FinFETs 基于改进表面电位的薄硅沟道双栅极SOI finfet电流建模
2009 2nd International Workshop on Electron Devices and Semiconductor Technology Pub Date : 2009-06-01 DOI: 10.1109/EDST.2009.5166123
R. Yadav, R. P. Prakash, S. C. Bose
{"title":"Modified surface potential based current modeling of thin silicon channel double gate SOI FinFETs","authors":"R. Yadav, R. P. Prakash, S. C. Bose","doi":"10.1109/EDST.2009.5166123","DOIUrl":"https://doi.org/10.1109/EDST.2009.5166123","url":null,"abstract":"Recently, the industry has focused a great deal on the use of non-planar multi-gate device structures. Many drain current models are available for undoped thin silicon channel double-gate (DG) silicon-on-insulator (SOI) MOSFET, but these models do not take charge coupling effect into account leading to an error of more than 20 percent for silicon channel thicknesses below 30nm. Hence, we present here a modified drain current model based on the widely accepted and studied Ortiz-Conde suface potential model. The proposed model incorporates charge-coupling effect which comes into play in thin silicon channel multi-gate devices due to interaction of the multiple gates. The results of both the Ortiz-Conde's surface potential based model and the modified current model have been compared with simulated results obtained from Taurus-Davinci simulator. The modified model has an error percentage less than 4% even for channel widths as low as 5nm. Results are not compared below 5nm as Quantum effects are observed for channel thicknesses less than 5nm.","PeriodicalId":219136,"journal":{"name":"2009 2nd International Workshop on Electron Devices and Semiconductor Technology","volume":"201 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129055647","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Compact modeling of SOI-LDMOS including quasi-saturation effect 含准饱和效应的SOI-LDMOS紧凑模型
2009 2nd International Workshop on Electron Devices and Semiconductor Technology Pub Date : 2009-06-01 DOI: 10.1109/EDST.2009.5166121
T. Lekshmi., Amit Mittal, A. DasGupta, A. Chakravorty, N. Dasgupta
{"title":"Compact modeling of SOI-LDMOS including quasi-saturation effect","authors":"T. Lekshmi., Amit Mittal, A. DasGupta, A. Chakravorty, N. Dasgupta","doi":"10.1109/EDST.2009.5166121","DOIUrl":"https://doi.org/10.1109/EDST.2009.5166121","url":null,"abstract":"This paper presents a physics-based compact dc model for high voltage silicon on insulator lateral double diffused MOS (SOI-LDMOS) transistor, assuming uniform doping for the channel. It uses MM20 model for the channel and drift region under the thin gate oxide, and proposes a new model for the drift region under the field oxide. This model shows that the current at higher gate voltages in SOI-LDMOS, is limited by the velocity saturation in the drift region under the field oxide, which determines the device behavior in the quasi-saturation region. The model exhibits high level of accuracy over wide bias ranges.","PeriodicalId":219136,"journal":{"name":"2009 2nd International Workshop on Electron Devices and Semiconductor Technology","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132149159","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
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