2012 International Conference for High Performance Computing, Networking, Storage and Analysis最新文献_第8页

4.45 Pflops astrophysical N-body simulation on K computer -- The gravitational trillion-body problem 4.45 Pflops天体物理n体K计算机模拟——引力万亿体问题

2012 International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2012-11-10 DOI: 10.1109/SC.2012.3

T. Ishiyama, Keigo Nitadori, J. Makino

引用次数: 81

Accelerating MapReduce on a coupled CPU-GPU architecture 在CPU-GPU耦合架构下加速MapReduce

2012 International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2012-11-10 DOI: 10.1109/SC.2012.16

Linchuan Chen, Xin Huo, G. Agrawal

{"title":"Accelerating MapReduce on a coupled CPU-GPU architecture","authors":"Linchuan Chen, Xin Huo, G. Agrawal","doi":"10.1109/SC.2012.16","DOIUrl":"https://doi.org/10.1109/SC.2012.16","url":null,"abstract":"The work presented here is driven by two observations. First, heterogeneous architectures that integrate a CPU and a GPU on the same chip are emerging, and hold much promise for supporting power-efficient and scalable high performance computing. Second, MapReduce has emerged as a suitable framework for simplified parallel application development for many classes of applications, including data mining and machine learning applications that benefit from accelerators. This paper focuses on the challenge of scaling a MapReduce application using the CPU and GPU together in an integrated architecture. We develop different methods for dividing the work, which are the map-dividing scheme, where map tasks are divided between both devices, and the pipelining scheme, which pipelines the map and the reduce stages on different devices. We develop dynamic work distribution schemes for both the approaches. To achieve high load balance while keeping scheduling costs low, we use a runtime tuning method to adjust task block sizes for the map-dividing scheme. Our implementation of MapReduce is based on a continuous reduction method, which avoids the memory overheads of storing key-value pairs. We have evaluated the different design decisions using 5 popular MapReduce applications. For 4 of the applications, our system achieves 1.21 to 2.1 speedup over the better of the CPU-only and GPU-only versions. The speedups over a single CPU core execution range from 3.25 to 28.68. The runtime tuning method we have developed achieves very low load imbalance, while keeping scheduling overheads low. Though our current work is specific to MapReduce, many underlying ideas are also applicable towards intra-node acceleration of other applications on integrated CPU-GPU nodes.","PeriodicalId":217221,"journal":{"name":"2012 International Conference for High Performance Computing, Networking, Storage and Analysis","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131731472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 106

Measuring interference between live datacenter applications 测量实时数据中心应用程序之间的干扰

2012 International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2012-11-10 DOI: 10.1109/SC.2012.78

Melanie Kambadur, Tipp Moseley, R. Hank, Martha A. Kim

引用次数: 107

A multithreaded algorithm for network alignment via approximate matching 基于近似匹配的多线程网络对齐算法

2012 International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2012-11-10 DOI: 10.1109/SC.2012.8

Arif M. Khan, D. Gleich, A. Pothen, M. Halappanavar

引用次数: 30

Usage behavior of a large-scale scientific archive 大型科学档案的使用行为

2012 International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2012-11-10 DOI: 10.1109/SC.2012.110

I. Adams, B. A. Madden, J. Frank, M. Storer, E. L. Miller, Gene Harano

引用次数: 15

Patus for convenient high-performance stencils: Evaluation in earthquake simulations 方便的高性能模板研究进展:地震模拟中的评估

2012 International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2012-11-10 DOI: 10.1109/SC.2012.95

M. Christen, O. Schenk, Yifeng Cui

引用次数: 37

Hierarchical task mapping of cell-based AMR cosmology simulations 基于细胞的AMR宇宙学模拟的分层任务映射

2012 International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2012-11-10 DOI: 10.1109/SC.2012.63

Jingjin Wu, Z. Lan, Xuanxing Xiong, N. Gnedin, A. Kravtsov

引用次数: 13

A scalable, numerically stable, high-performance tridiagonal solver using GPUs 一个可扩展的，数字稳定的，高性能的三对角线求解器使用gpu

2012 International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2012-11-10 DOI: 10.1109/SC.2012.12

Li-Wen Chang, John A. Stratton, Heehoon Kim, Wen-mei W. Hwu

引用次数: 63

Direction-optimizing Breadth-First Search 方向优化宽度优先搜索

2012 International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2012-11-10 DOI: 10.3233/SPR-130370

S. Beamer, K. Asanović, D. Patterson

引用次数: 444

A practical method for estimating performance degradation on multicore processors, and its application to HPC workloads 一种估计多核处理器性能退化的实用方法及其在高性能计算工作负载中的应用

2012 International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2012-11-10 DOI: 10.1109/SC.2012.11

Tyler Dwyer, Alexandra Fedorova, S. Blagodurov, Mark Roth, Fabien Gaud, J. Pei

{"title":"A practical method for estimating performance degradation on multicore processors, and its application to HPC workloads","authors":"Tyler Dwyer, Alexandra Fedorova, S. Blagodurov, Mark Roth, Fabien Gaud, J. Pei","doi":"10.1109/SC.2012.11","DOIUrl":"https://doi.org/10.1109/SC.2012.11","url":null,"abstract":"When multiple threads or processes run on a multi-core CPU they compete for shared resources, such as caches and memory controllers, and can suffer performance degradation as high as 200%. We design and evaluate a new machine learning model that estimates this degradation online, on previously unseen workloads, and without perturbing the execution. Our motivation is to help data center and HPC cluster operators effectively use workload consolidation. Data center consolidation is about placing many applications on the same server to maximize hardware utilization. In HPC clusters, processes of the same distributed applications run on the same machine. Consolidation improves hardware utilization, but may sacrifice performance as processes compete for resources. Our model helps determine when consolidation is overly harmful to performance. Our work is the first to apply machine learning to this problem domain, and we report on our experience reaping the advantages of machine learning while navigating around its limitations. We demonstrate how the model can be used to improve performance fidelity and save energy for HPC workloads.","PeriodicalId":217221,"journal":{"name":"2012 International Conference for High Performance Computing, Networking, Storage and Analysis","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117231293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 73