H. Hansson, Thomas Nolte, Mikael Sjödin, Daniel Sundmark
{"title":"Real-Time in Networked Embedded Systems","authors":"H. Hansson, Thomas Nolte, Mikael Sjödin, Daniel Sundmark","doi":"10.1201/9781439807637.ch1","DOIUrl":"https://doi.org/10.1201/9781439807637.ch1","url":null,"abstract":"","PeriodicalId":214400,"journal":{"name":"Embedded Systems Design and Verification","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124015597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"FPGA Synthesis and Physical Design","authors":"M. Hutton, Vaughn Betz","doi":"10.1201/9781439807637.ch17","DOIUrl":"https://doi.org/10.1201/9781439807637.ch17","url":null,"abstract":"","PeriodicalId":214400,"journal":{"name":"Embedded Systems Design and Verification","volume":"117 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133921032","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Languages for Design and Verification","authors":"S. Edwards","doi":"10.1201/9781439807637.ch5","DOIUrl":"https://doi.org/10.1201/9781439807637.ch5","url":null,"abstract":"","PeriodicalId":214400,"journal":{"name":"Embedded Systems Design and Verification","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122435662","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Embedded Software Modeling and Design","authors":"M. Natale","doi":"10.1201/9781439807637.ch4","DOIUrl":"https://doi.org/10.1201/9781439807637.ch4","url":null,"abstract":"The development of correct complex software for reactive embedded systems requires automated support for the verification of functional and nonfunctional properties by formal analysis or by simulation and testing. Reduced time-to-market and increased complexity also demand the reuse of components, which also brings the issue of composability of software artifacts. Currently, a language (or a design methodology) that can provide all these desirable features without incurring excessive inefficiency is not available, and a strong semantic characterization of the modeling language or separation of the concerns between the functional and the architecture-level design is the solution advocated by many. This chapter provides an overview of existing models and tools for embedded software, starting from an introduction to the fundamental concepts and the basic theory of existing models of computation, both synchronous and asynchronous. The chapter also features an introduction to commercial languages and tools such as Unified Modeling Language (UML) and Specification and Description Language (SDL), and a quick peek at research work in software models and tools, to give a firm understanding of future trends and currently unsolved issues.","PeriodicalId":214400,"journal":{"name":"Embedded Systems Design and Verification","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125533183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Ayala, M. López-Vallejo, D. Bertozzi, L. Benini
{"title":"SoC Communication Architectures: From Interconnection Buses to Packet-Switched NoCs","authors":"J. Ayala, M. López-Vallejo, D. Bertozzi, L. Benini","doi":"10.1201/9781439807637.ch14","DOIUrl":"https://doi.org/10.1201/9781439807637.ch14","url":null,"abstract":"","PeriodicalId":214400,"journal":{"name":"Embedded Systems Design and Verification","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129498403","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Web Services for Embedded Devices","authors":"H. Bohn, F. Golatowski","doi":"10.1201/9781439807637.ch19","DOIUrl":"https://doi.org/10.1201/9781439807637.ch19","url":null,"abstract":"","PeriodicalId":214400,"journal":{"name":"Embedded Systems Design and Verification","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129749200","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Processor-Centric Architecture Description Languages","authors":"S. Leibson, H. Sanghavi, Nupur Andrews","doi":"10.1201/9781439807637.ch7","DOIUrl":"https://doi.org/10.1201/9781439807637.ch7","url":null,"abstract":"","PeriodicalId":214400,"journal":{"name":"Embedded Systems Design and Verification","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131488093","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Synchronous Hypothesis and Polychronous Languages","authors":"D. Potop-Butucaru, R. Simone, J. Talpin","doi":"10.1201/9781439807637.ch6","DOIUrl":"https://doi.org/10.1201/9781439807637.ch6","url":null,"abstract":"","PeriodicalId":214400,"journal":{"name":"Embedded Systems Design and Verification","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124492453","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Processors for Embedded Systems","authors":"S. Leibson","doi":"10.1201/9781439807637.ch12","DOIUrl":"https://doi.org/10.1201/9781439807637.ch12","url":null,"abstract":"","PeriodicalId":214400,"journal":{"name":"Embedded Systems Design and Verification","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130307133","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Francisco Gilabert Villamón, D. Bertozzi, L. Benini, G. Micheli
{"title":"Networks-on-Chip: an Interconnect Fabric for Multiprocessor Systems-on-Chip","authors":"Francisco Gilabert Villamón, D. Bertozzi, L. Benini, G. Micheli","doi":"10.1201/9781439807637.ch15","DOIUrl":"https://doi.org/10.1201/9781439807637.ch15","url":null,"abstract":"","PeriodicalId":214400,"journal":{"name":"Embedded Systems Design and Verification","volume":"217 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116062222","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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