1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305)最新文献_第5页

A method of service quality estimation with a network measurement tool 一种基于网络测量工具的服务质量评估方法

1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305) Pub Date : 1999-02-10 DOI: 10.1109/PCCC.1999.749439

O. Maeshima, Yoshihiro Ito, M. Ishikura, T. Asami

引用次数: 8

Measuring dynamic memory invocations in object-oriented programs 测量面向对象程序中的动态内存调用

1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305) Pub Date : 1999-02-10 DOI: 10.1109/PCCC.1999.749448

M. Chang, Woo Hyong Lee, Y. Hasan

{"title":"Measuring dynamic memory invocations in object-oriented programs","authors":"M. Chang, Woo Hyong Lee, Y. Hasan","doi":"10.1109/PCCC.1999.749448","DOIUrl":"https://doi.org/10.1109/PCCC.1999.749448","url":null,"abstract":"Dynamic memory management has been a high cost component in many software systems. Studies have shown that memory intensive C programs can consume up to 30% of the program runtime in memory allocation and liberation. The OOP language system tends to perform object creation and deletion prolifically. An empirical study shown that C++ programs can have ten times more memory allocation and deallocation than comparable C programs. However, the allocation behavior of C++ programs is rarely reported. This paper attempts to locate where the dynamic memory allocations are coming from and report an empirical study of dynamic memory invocations in C++ programs. Firstly, this paper summarizes the hypothesis of situations that invoke the dynamic memory management explicitly and implicitly. They are: constructors, copy constructors, overloading assignment operator=, type conversions and application specific member functions. Secondly, the development of a source code level tracing tool is reported as the procedure to investigate the hypothesis. Thirdly, results include behavioral patterns of memory allocations. With these patterns, we may increase the reusability of the resources. For example, a profile-based strategy can be used to improve the performance of dynamic memory management. The C++ programs that were traced include Java compiler, CORBA compliant and visual framework.","PeriodicalId":211210,"journal":{"name":"1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1999-02-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132333329","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 14

Enhancing the PCI bus to support real-time streams 增强PCI总线以支持实时流

1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305) Pub Date : 1999-02-10 DOI: 10.1109/PCCC.1999.749453

M. Scottis, M. Krunz, M. M. Liu

引用次数: 5

A PowerPC platform full system simulation-from the MOOSE up 一个PowerPC平台完整的系统模拟-从MOOSE开始

1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305) Pub Date : 1999-02-10 DOI: 10.1109/PCCC.1999.749472

L. Robinson, G. Whisenhunt

引用次数: 2

Space optimal PIF algorithm: self-stabilized with no extra space 空间最优PIF算法:自稳定，无额外空间

1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305) Pub Date : 1999-02-10 DOI: 10.1109/PCCC.1999.749416

A. Bui, A. Datta, F. Petit, V. Villain

引用次数: 17

Design and analysis of one prong network restoration algorithms 单点网络恢复算法的设计与分析

1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305) Pub Date : 1999-02-10 DOI: 10.1109/PCCC.1999.749440

C. E. Chow, A. Hansmats

引用次数: 2

Using a single address space operating system for distributed computing and high performance 采用单地址空间操作系统，实现分布式计算和高性能

1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305) Pub Date : 1999-02-10 DOI: 10.1109/PCCC.1999.749414

Alan Skousen, Donald S. Miller

{"title":"Using a single address space operating system for distributed computing and high performance","authors":"Alan Skousen, Donald S. Miller","doi":"10.1109/PCCC.1999.749414","DOIUrl":"https://doi.org/10.1109/PCCC.1999.749414","url":null,"abstract":"Recent 64-bit microprocessors have made a huge 18.4 quintillion byte address space potentially available to programs. This has led to the design of Operating Systems that provide a single virtual address space in which all code and data reside in and that spans all levels of storage and all nodes of a distributed system. These operating systems called SASOSs, have characteristics that can be used to support synchronization and coherency in a distributed system in ways that provide an improved program development environment and higher performance than that available from conventional operating systems. Sombrero, our SASOS design, makes use of its hardware support for object-grained protection, separate thread related protection domains and implicit protection domain crossing to provide synchronization and coherency support for distributed object copy set management not available in SASOSs built on stock processors. Its design, which provides direct system level support for object oriented programming includes a number of system architectural features targeted at modern distributed computing.","PeriodicalId":211210,"journal":{"name":"1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1999-02-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129069641","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 21

Are all scientific workloads equal? 所有的科学工作量都相等吗?

1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305) Pub Date : 1999-02-10 DOI: 10.1109/PCCC.1999.749450

R. Oliver, P. Teller

{"title":"Are all scientific workloads equal?","authors":"R. Oliver, P. Teller","doi":"10.1109/PCCC.1999.749450","DOIUrl":"https://doi.org/10.1109/PCCC.1999.749450","url":null,"abstract":"Widely-used benchmarks are commonly classified as either scientific or commercial. Although process execution characteristics have been used as indicators of a benchmark's classification, a set of these characteristics along with a mechanism that can be used to easily compare and contrast workloads and partition them into classes with respect to these characteristics has not been identified. This paper identifies a set of process execution characteristics (PEC) that can be used to compare and contrast workloads and a method that can be used to partition workloads with respect to their PEC. These PEC, such as instruction locality, execution cycles per instruction, and context-switch frequency, are displayed with a high-density visualization tool called the PEC-Graph. Using the centroid linkage algorithm, processes' PEC are partitioned into clusters that are used to construct a taxonomy of workloads that is finer grained than taxonomies previously reported in the literature. The finer-grained categorization of workloads enables computer architects to select workloads that are known to stress specific architectural features, yielding potentially better performance analysis of new designs.","PeriodicalId":211210,"journal":{"name":"1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1999-02-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131707707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

A toolset for assisted formal verification 辅助正式验证的工具集

1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305) Pub Date : 1999-02-10 DOI: 10.1109/PCCC.1999.749477

N. Malik, J. Baumgartner, S. Roberts, Ryan Dobson

{"title":"A toolset for assisted formal verification","authors":"N. Malik, J. Baumgartner, S. Roberts, Ryan Dobson","doi":"10.1109/PCCC.1999.749477","DOIUrl":"https://doi.org/10.1109/PCCC.1999.749477","url":null,"abstract":"There has been a growing interest in applying formal methods for functional and performance verification of complex and safety critical designs. Model checking is one of the most common formal verification methodologies utilized in verifying sequential logic due to its automated decision procedures and its ability to provide \"counter examples\" for debugging. However, model checking hasn't found broad acceptance as a verification methodology due to its complexity. This arises because of the need to specify correctness properties in a temporal logic language and develop an environment around a partitioned model under test in a non deterministic HDL-type language. Generally, engineers are not trained in mathematical logic languages and becoming proficient in such a language requires a steep learning curve. Furthermore, defining a behavioral environment at the complex and undocumented microarchitectural interface level is a time consuming and error prone activity. As such, there is a strong motivation to bring the model checking technology to a level such that the designers may utilize this technology as a part of their design process without being burdened with the details that are generally only within the grasps of computer theoreticians. The paper outlines two tools which greatly assist in this goal: the first, Polly, automates the difficult and error prone task of developing the behavioral environment around the partitioned model under test; the second Oracle, obviates the need for learning temporal logic to enter specification.","PeriodicalId":211210,"journal":{"name":"1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1999-02-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132223971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

PDATS II: improved compression of address traces PDATS II:改进的地址轨迹压缩

1999 IEEE International Performance, Computing and Communications Conference (Cat. No.99CH36305) Pub Date : 1999-02-10 DOI: 10.1109/PCCC.1999.749423

E. Johnson

引用次数: 22