{"title":"Formal specification of flexible web service composition","authors":"Y. Oussalah, N. Zeghib","doi":"10.1504/IJCCBS.2015.073517","DOIUrl":"https://doi.org/10.1504/IJCCBS.2015.073517","url":null,"abstract":"Web services give a standard way for interface definition, transport mechanism, description, discovery and integration of services. Although the heterogeneity among applications is reduced, mismatches may occur at different levels structural, behavioural and non-functional during web services composition process. These mismatches require adaptation to ensure the correct working between web services. In this paper, we propose an approach for dynamic web service composition and adaptation. We specify formally the flexible web service composition FWSC using a rewriting logic-based language namely Maude. We show how to adapt the interfaces of existing web services without having to operate on the source manually. As a result, existing web services may be easily reused in a broader range of applications, and services libraries do not need to store many variants of a component that differ only in how the interfaces are used.","PeriodicalId":210749,"journal":{"name":"Int. J. Crit. Comput. Based Syst.","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123593742","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Vikash Katta, Christian Raspotnig, P. Kárpáti, T. Stålhane
{"title":"Investigating fulfilment of traceability requirements in a combined process for safety and security assessments","authors":"Vikash Katta, Christian Raspotnig, P. Kárpáti, T. Stålhane","doi":"10.1504/IJCCBS.2015.073530","DOIUrl":"https://doi.org/10.1504/IJCCBS.2015.073530","url":null,"abstract":"Combined harm assessment of safety and security for information systems CHASSIS method defines a unified process for safety and security assessments. CHASSIS applies techniques from safety and security fields - e.g., misuse case and HAZOP - to identify and model hazards, threats, safety and security requirements to a system. Ensuring traceability between safety and security requirements as well as other artefacts is one of the important tasks required to provide safety and security assurance. In this paper, we present an approach for traceability, called SaTrAP, which was used to provide traceability support to CHASSIS. We discuss the application of SaTrAp and CHASSIS with the help of an ATM remote tower example. We evaluate whether CHASSIS together with SaTrAp fulfils the traceability requirements set by standards. In this regard, we have analysed regulations/standards from ATM domain for requirements on traceability. We also analysed how security has been addressed by these standards.","PeriodicalId":210749,"journal":{"name":"Int. J. Crit. Comput. Based Syst.","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131814327","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The applications of SFTA and SFMEA approaches during software development process: an analytical review","authors":"Pankaj Vyas, R. K. Mittal","doi":"10.1504/IJCCBS.2015.068851","DOIUrl":"https://doi.org/10.1504/IJCCBS.2015.068851","url":null,"abstract":"Software fault tree analysis SFTA and software failure modes and effects analysis SFMEA are two well known recommended approaches for the analysis of software induced hazards in the system and are adapted in the software domain by employing the concepts of standard hardware safety approaches namely fault tree analysis FTA and failure modes and effects analysis FMEA respectively. Both SFTA and SFMEA approaches, since their inception in the software domain, have been explored, either individually or jointly, by researchers at different stages of software development. This paper presents the critical review of the published work about the applications of both these approaches in three phases, namely requirements analysis, design and implementation/coding phases of software life cycle. After presenting the analytical review, the paper identifies the problems that are currently faced during the applications of these approaches and guides the directions for carrying out further research.","PeriodicalId":210749,"journal":{"name":"Int. J. Crit. Comput. Based Syst.","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121546259","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Automated generation of minimal cut sets from AltaRica 3.0 models","authors":"T. Prosvirnova, A. Rauzy","doi":"10.1504/IJCCBS.2015.068852","DOIUrl":"https://doi.org/10.1504/IJCCBS.2015.068852","url":null,"abstract":"In this article, we present an algorithm to generate minimal cut sets from AltaRica 3.0 models. AltaRica 3.0 improves the previous versions of the language by introducing a fixpoint mechanism to stabilise values of variables after each transition firing. This fixpoint mechanism allows the design of acausal models and the analysis of systems with instant loops. It makes however the generation of fault trees more complex. We show here that by using advanced partitioning techniques, we can nevertheless design an efficient generation algorithm. We illustrate the different steps of this algorithm by means of a red wire example.","PeriodicalId":210749,"journal":{"name":"Int. J. Crit. Comput. Based Syst.","volume":"82 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131779386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Supporting SW-FMEA through an ontology-based methodology","authors":"Irene Bicchierai, G. Bucci, E. Vicario","doi":"10.1504/IJCCBS.2015.068840","DOIUrl":"https://doi.org/10.1504/IJCCBS.2015.068840","url":null,"abstract":"Failure mode and effects analysis FMEA is a widely used dependability and safety technique aiming at systematically identifying failure modes, their causes, their effects, and the countermeasures that could mitigate their impact. Although FMEA has been thought for hardware, its use is also advocated for software SW-FMEA. However, this involves several major hurdles such as the complexity of functional requirements and the difficulty to identify failure modes of SW components. We present an approach for efficient and effective manipulation of data involved in the SW-FMEA process, introducing an ontological model that formalises concepts comprised in the analysis and provides a common conceptual framework supporting cohesion across different stages of a development life-cycle. The ontological model opened the way to the implementation of a tool, which automates SW-FMEA providing support for basic and advanced functionalities, fastening the analysis. Use of the tool in a real SW development process is discussed at the end of the paper.","PeriodicalId":210749,"journal":{"name":"Int. J. Crit. Comput. Based Syst.","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130060168","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Compositional reactive semantics of system-level designs written in SystemC and formal verification with predicate abstraction","authors":"N. Harrath, B. Monsuez","doi":"10.1504/IJCCBS.2014.064666","DOIUrl":"https://doi.org/10.1504/IJCCBS.2014.064666","url":null,"abstract":"In this paper, we propose a method to automatically extract an abstract representation of SystemC components into the SystemC-waiting state automata: a compositional formal model for verifying properties of SystemC at the transaction level within a delta-cycle. The main drawback of this model as mentioned in previous works was that it should be provided manually. In this paper, we propose a method to automatically build the SystemC waiting-state automata from the SystemC code. First, we select a subset of SystemC language and define its operational semantics that succinctly captures its reactive features and allows the specification of synchronous and asynchronous communications between the communicating components. Next, we symbolically execute the SystemC code using these semantics to generate the set of all possible traces and finally we use predicate abstraction to reduce the complexity of the generated graph during symbolic execution. We illustrate the use of symbolic execution and then predicate abstraction for two examples of SystemC programs: one that handles execution traces without loops and another one that handles loops.","PeriodicalId":210749,"journal":{"name":"Int. J. Crit. Comput. Based Syst.","volume":"165 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126664757","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Functional safety of adaptive embedded control systems: new solutions","authors":"Atef Gharbi, M. Khalgui","doi":"10.1504/IJCCBS.2014.064665","DOIUrl":"https://doi.org/10.1504/IJCCBS.2014.064665","url":null,"abstract":"This paper deals with the functional safety of embedded control system following component-based technologies. The functional safety in a device of the interconnected control components is handled by an agent that controls and adapts the local behaviour at run-time. The interaction between control agents in devices is ensured via the communication protocol based on a coordination agent. We propose technical solutions to implement the whole agent-based architecture, by defining UML meta-models for both control components and also agents. At the operational level, an OS task is assumed to be a set of components having some properties independently from any real-time operating system. To guarantee safety reconfiguration of OS tasks at run-time, we define service and reconfiguration processes for safety. We apply the priority ceiling protocol as a method to ensure the scheduling between periodic tasks with precedence and mutual exclusion constraints.","PeriodicalId":210749,"journal":{"name":"Int. J. Crit. Comput. Based Syst.","volume":"95 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129127249","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Zhang, B. Bérard, L. Hillah, F. Kordon, Y. Thierry-Mieg
{"title":"Controllability for discrete event systems modelled in VeriJ","authors":"Y. Zhang, B. Bérard, L. Hillah, F. Kordon, Y. Thierry-Mieg","doi":"10.1504/IJCCBS.2014.064668","DOIUrl":"https://doi.org/10.1504/IJCCBS.2014.064668","url":null,"abstract":"Existing tools for controllability checking mostly apply to abstract formalisms like finite automata or Petri nets. To avoid costly building of low-level formal models for large complex systems, we propose a programming language called VeriJ, a subset of Java with additional constructs dedicated to supervisory control, to model these systems in a familiar and friendly development environment. We provide a prototype tool chain, based on model transformation and pushdown automata, to automatically transform a system described in VeriJ into a labelled transition system (LTS). A controllability engine for this LTS is then integrated to the tool. To limit the state space explosion problem, we also add several mechanisms including garbage collection, abstraction, state compression, and partial exploration. Our approach, illustrated with a VeriJ model of the Nim game, shows that it is possible to combine: 1) the benefits resulting from using mature Java development environments; 2) performances comparable to those of existing tools.","PeriodicalId":210749,"journal":{"name":"Int. J. Crit. Comput. Based Syst.","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130437996","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"End-to-end latency and temporal consistency analysis in networked real-time systems","authors":"M. Lauer, F. Boniol, C. Pagetti, Jérôme Ermont","doi":"10.1504/IJCCBS.2014.064667","DOIUrl":"https://doi.org/10.1504/IJCCBS.2014.064667","url":null,"abstract":"Critical embedded systems are often designed as a set of real-time tasks, running on shared computing modules, and communicating through networks. Because of their critical nature, such systems have to meet strict timing properties. To help the designers to prove the correctness of their system, the real-time systems community has developed numerous approaches for analysing the worst case scenarios either on the processors (e.g., worst case response time of a task) or on the networks (e.g., worst case traversal time of a message). These approaches provide results only for local components behaviours. However, there is a growing need for having a global view of the system, in order to determine end-to-end properties. Such a property applies to functional chains which describe the behaviour of sequences of tasks. We propose an approach to analyse worst case behaviour along functional chains in critical embedded systems. It is based on mixed integer linear programming (MILP) and is general in the sense that it can be applied to a variety of end-to-end properties. This paper focuses on two essential properties: end-to-end latency and temporal consistency. This work was supported by the French National Research Agency within the SATRIMMAP project.","PeriodicalId":210749,"journal":{"name":"Int. J. Crit. Comput. Based Syst.","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128340199","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Sabine Boufenara, Kamel Barkaoui, F. Belala, H. Boucheneb
{"title":"Transactional Petri nets: a semantic framework for UML2 activities","authors":"Sabine Boufenara, Kamel Barkaoui, F. Belala, H. Boucheneb","doi":"10.1504/IJCCBS.2014.064663","DOIUrl":"https://doi.org/10.1504/IJCCBS.2014.064663","url":null,"abstract":"Transactional Petri nets (TPNets) are a new class of high-level zero-safe nets (ZSNs), defined as a semantic framework for UML2 activity diagrams. Indeed, they capture the behaviour associated with non-local actions triggering, cancellation patterns and the advanced synchronisation that result. While, reactivity is guaranteed due to the real time massive cancellation semantics, based on the definition of new dynamic enabling rules and the definition of priority among executions, global synchronisation in turn is assured as a result of non-locality principle; an outcome of atomic stable transactions use. The operational semantics of TPNets is defined within rewriting logic-based framework.","PeriodicalId":210749,"journal":{"name":"Int. J. Crit. Comput. Based Syst.","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133087667","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}