2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)最新文献_第2页

iPROBE-O: FIB-aware Place and Route for Probing Protection Using Orthogonal Shields iPROBE-O:基于正交屏蔽的探测保护的光纤感知位置和路径

2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) Pub Date : 2022-12-14 DOI: 10.1109/AsianHOST56390.2022.10022018

Minyan Gao, Domenic Forte

{"title":"iPROBE-O: FIB-aware Place and Route for Probing Protection Using Orthogonal Shields","authors":"Minyan Gao, Domenic Forte","doi":"10.1109/AsianHOST56390.2022.10022018","DOIUrl":"https://doi.org/10.1109/AsianHOST56390.2022.10022018","url":null,"abstract":"Focused ion beam (FIB) probing attacks rely on advanced milling and deposition capabilities to significantly threaten the confidentiality of on-chip security assets such as private keys and device configuration. The existing countermeasures either suffer from the prohibitively high area overhead or low reliability, failing to serve as a perfect fit to address the issues. Recently, iPROBE framework has been proposed as a physical design flow enhancing the layout/device security against FIB attacks by adding additional shield nets at a minor cost. However, the parallel shielding methodology and metrics of iPROBE merely focus on the perpendicular FIB model instead of covering a more threatening one, tilted probing. In this paper, we present iPROBE-O to enable FIB-aware placement and routing using orthogonal shields to thwart both perpendicular and titled FIB intrusions. Besides, we extend the definition of shield coverage in the previous iPROBE work and propose the tilted shield security metric to comprehensively quantify the shield protection on every layer beneath the shield against tilted probing attacks. This metric allows users to choose the desired scheme such as shield layers and density accordingly for the optimal trade-off between overhead and security. Moreover, to alleviate the routing congestion risks from the orthogonal shields, we introduce keepout region between the shield drivers and target cells allowing more space and analytically assessing how the factors keepout region and a total number of gates jointly impact the overall protection strength. We demonstrate the effectiveness of iPROBE-O framework on a variety of benchmarks including AES, DES, and Simon by reducing up to 80% decrease on the exposed area can be achieved and the timing and area overhead is less than 3%.","PeriodicalId":207435,"journal":{"name":"2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131037416","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

HARD-Lite: A Lightweight Hardware Anomaly Realtime Detection Framework Targeting Ransomware 针对勒索软件的轻量级硬件异常实时检测框架

2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) Pub Date : 2022-12-14 DOI: 10.1109/AsianHOST56390.2022.10022111

Chutitep Woralert, Chen Liu, Zander Blasingame

{"title":"HARD-Lite: A Lightweight Hardware Anomaly Realtime Detection Framework Targeting Ransomware","authors":"Chutitep Woralert, Chen Liu, Zander Blasingame","doi":"10.1109/AsianHOST56390.2022.10022111","DOIUrl":"https://doi.org/10.1109/AsianHOST56390.2022.10022111","url":null,"abstract":"Recent years have witnessed a surge in ransomware attacks. Especially, many a new variant of ransomware has continued to emerge, employing more advanced techniques distributing the payload while avoiding detection. This renders the traditional static ransomware detection mechanism ineffective. In this paper, we present our Hardware Anomaly Realtime Detection - Lightweight (HARD-Lite) framework that employs semi-supervised machine learning method to detect ransomware using low-level hardware information. By using an LSTM network with a weighted majority voting ensemble and exponential moving average, we are able to take into consideration the temporal aspect of hardware-level information formed as time series in order to detect deviation in system behavior, thereby increasing the detection accuracy whilst reducing the number of false positives. Testing against various ransomware across multiple families, HARD-Lite has demonstrated remarkable effectiveness, detecting all cases tested successfully. What's more, with a hierarchical design that distributing the classifier from the user machine that is under monitoring to a server machine, Hard-Lite enables good scalability as well.","PeriodicalId":207435,"journal":{"name":"2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121167703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

EISec: Exhaustive Information Flow Security of Hardware Intellectual Property Utilizing Symbolic Execution 基于符号执行的硬件知识产权详尽信息流安全

2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) Pub Date : 2022-12-14 DOI: 10.1109/AsianHOST56390.2022.10022071

Farhaan Fowze, Muhtadi Choudhury, Domenic Forte

{"title":"EISec: Exhaustive Information Flow Security of Hardware Intellectual Property Utilizing Symbolic Execution","authors":"Farhaan Fowze, Muhtadi Choudhury, Domenic Forte","doi":"10.1109/AsianHOST56390.2022.10022071","DOIUrl":"https://doi.org/10.1109/AsianHOST56390.2022.10022071","url":null,"abstract":"Hardware IPs are assumed to be roots-of-trust in complex SoCs. However, their design and security verification are still heavily dependent on manual expertise. Extensive research in this domain has shown that even cryptographic modules may lack information flow security, making them susceptible to remote attacks. Further, when an SoC is in the hands of the attacker, physical attacks such as fault injection are possible. This paper introduces EISec, a novel tool utilizing symbolic execution for exhaustive analysis of hardware IPs. EISec operates at the pre-silicon stage on the gate level netlist of a design. It detects information flow security violations and generates the exhaustive set of control sequences that reproduces them. We further expand its capabilities to quantify the confusion and diffusion present in cryptographic modules and to analyze an FSM's susceptibility to fault injection attacks. The proposed methodology efficiently explores the complete input space of designs utilizing symbolic execution. In short, EISec is a holistic security analysis tool to help hardware designers capture security violations early on and mitigate them by reporting their triggers.","PeriodicalId":207435,"journal":{"name":"2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124909777","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Fundamental Study of Adversarial Examples Created by Fault Injection Attack on Image Sensor Interface 图像传感器接口故障注入攻击生成对抗实例的基础研究

2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) Pub Date : 2022-12-14 DOI: 10.1109/AsianHOST56390.2022.10022189

Tatsuya Oyama, Kota Yoshida, S. Okura, T. Fujino

{"title":"Fundamental Study of Adversarial Examples Created by Fault Injection Attack on Image Sensor Interface","authors":"Tatsuya Oyama, Kota Yoshida, S. Okura, T. Fujino","doi":"10.1109/AsianHOST56390.2022.10022189","DOIUrl":"https://doi.org/10.1109/AsianHOST56390.2022.10022189","url":null,"abstract":"Adversarial examples (AEs), which cause misclassification by adding subtle perturbations to input images, have been proposed as an attack method on image classification systems using deep neural networks (DNNs). Physical AEs created by attaching stickers to traffic signs have been reported, which are a threat against the traffic-sign-recognition DNNs used in advanced driver assistance systems (ADAS). We previously proposed an attack method that generates a noise area on images by superimposing an electrical signal on the mobile industry processor interface (MIPI) and showed that it can generate a single adversarial mark that triggers a backdoor attack on the input image. As the advanced approach, we propose the targeted misclassification attack method on DNN by the AEs which are generated by small perturbations to various places on the image by the fault injection. The perturbation position for AEs is precalculated in advance against the target traffic-sign image, which will be captured on future driving. The perturbation image (5.2-5.5% area is tampered with) is successfully created by the fault injection attack on MIPI, which is connected to Raspberry Pi. As the experimental results, we confirmed that the traffic-sign-recognition DNN on a Raspberry Pi was successfully misclassified when the target traffic sign was captured.","PeriodicalId":207435,"journal":{"name":"2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116661654","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

An Instruction-configurable Post-quantum Cryptographic Processor towards NTRU 面向NTRU的指令可配置后量子加密处理器

2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) Pub Date : 2022-12-14 DOI: 10.1109/AsianHOST56390.2022.10022178

Shuo Yang, Dongsheng Liu, Ang Hu, Aobo Li, Jiaming Zhang, Xiang Li, Jiahao Lu, Changwen Mo

引用次数: 0

FUNDAE: Fault Template Attack on SUNDAE-GIFT AEAD Scheme 基础:SUNDAE-GIFT ahead方案的故障模板攻击

2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) Pub Date : 2022-12-14 DOI: 10.1109/AsianHOST56390.2022.10022108

Rajat Sadhukhan, Anirban Chakraborty, Debdeep Mukhopadhyay

{"title":"FUNDAE: Fault Template Attack on SUNDAE-GIFT AEAD Scheme","authors":"Rajat Sadhukhan, Anirban Chakraborty, Debdeep Mukhopadhyay","doi":"10.1109/AsianHOST56390.2022.10022108","DOIUrl":"https://doi.org/10.1109/AsianHOST56390.2022.10022108","url":null,"abstract":"Fault Attacks (FA) have garnered a lot of attention from industry and academic research due to their practical and wide impact. In the framework of symmetric key cryptography, designing countermeasures against fault attacks is still an open problem with recent developments of advanced fault injection techniques. Recently proposed Fault Template Attack (FTA) has shown that without access to any ciphertext of a crypto execution, an adversary can still recover the secret key just by knowing if the computation is faulty or not. Additionally, usage of Authenticated Encryption with Associated Data (AEAD), a kind of symmetric-key operating mode, has gained momentum and become the standard for secret key communications. In this work, we first show how an adversary can very efficiently launch FTA using a combination of the right fault model and proper selection of an encryption block in AEAD operation, where we could recover full master key using 25 percent less fault requirements when compared to classical fault template attack. Then we propose a generic area redundant countermeasure scheme to thwart FTA in AEADs, where our countermeasure enabled circuit occupied only 16 percent additional area than unprotected circuit. We use SUNDAE-GIFT as the benchmark circuit for all our experiments.","PeriodicalId":207435,"journal":{"name":"2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126385158","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

EXERT: EXhaustive IntEgRiTy Analysis for Information Flow Security 施加:信息流安全的穷举完整性分析

2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) Pub Date : 2022-12-14 DOI: 10.1109/AsianHOST56390.2022.10022211

Jiaming Wu, Farhaan Fowze, Domenic Forte

{"title":"EXERT: EXhaustive IntEgRiTy Analysis for Information Flow Security","authors":"Jiaming Wu, Farhaan Fowze, Domenic Forte","doi":"10.1109/AsianHOST56390.2022.10022211","DOIUrl":"https://doi.org/10.1109/AsianHOST56390.2022.10022211","url":null,"abstract":"Hardware information flow analysis detects security vulnerabilities resulting from microarchitectural design flaws, design-for-test/debug (DfT/D) backdoors, and hardware Trojans. Though information flow violations can be manifested through a multitude of possible ways, prior research has only focused on detecting the existence of such vulnerabilities and no approach has been proposed to exhaustively activate all vulnerable points and reduce false positives. In this paper, we propose EXERT, a novel analysis framework that combines ATPG, SAT, and FSM analysis to detect information flow violations and perform exhaustive analysis that reports the complete set of violating input patterns for vulnerable control points. The FSM analysis, in particular, can be performed offline and helps resolve scalability limitations in prior approaches while remaining exhaustive. As proof-of-concept, EXERT is evaluated on multiple Trojan benchmarks from Trust-Hub. It detects rare Trojan triggers (activation probability ≈ 1.4243e-70), generates all activation patterns within minutes, and shows a 15 x to 110 x faster run time compared with Cadence Jasper Security Path Verification (SPV). EXERT is also applied to a larger RISC-V benchmark to identify instruction sequences that result in privilege escalation.","PeriodicalId":207435,"journal":{"name":"2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132390207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

LSB-Reused Protection Technique in Secure SAR ADC against Power Side-Channel Attack 安全SAR ADC抗功率侧信道攻击的lsb -重用保护技术

2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) Pub Date : 2022-12-14 DOI: 10.1109/AsianHOST56390.2022.10022192

Lele Fang, Jiahao Liu, Yan Zhu, Chi-Hang Chan, R. Martins

{"title":"LSB-Reused Protection Technique in Secure SAR ADC against Power Side-Channel Attack","authors":"Lele Fang, Jiahao Liu, Yan Zhu, Chi-Hang Chan, R. Martins","doi":"10.1109/AsianHOST56390.2022.10022192","DOIUrl":"https://doi.org/10.1109/AsianHOST56390.2022.10022192","url":null,"abstract":"Successive approximation register analog-to-digital converter (SAR ADC) is widely adopted in the Internet of Things (IoT) systems due to its simple structure and high energy efficiency. Unfortunately, SAR ADC dissipates various and unique power features when it converts different input signals, leading to severe vulnerability to power side-channel attack (PSA). The adversary can accurately derive the input signal by only measuring the power information from the analog supply pin (AVDD), digital supply pin (DVDD), and/or reference pin (Ref) which feed to the trained machine learning models. This paper first presents the detailed mathematical analysis of power side-channel attack (PSA) to SAR ADC, concluding that the power information from AVDD is the most vulnerable to PSA compared with the other supply pin. Then, an LSB-reused protection technique is proposed, which utilizes the characteristic of LSB from the SAR ADC itself to protect against PSA. Lastly, this technique is verified in a 12-bit 5 MS/s secure SAR ADC implemented in 65nm technology. By using the current waveform from AVDD, the adopted convolutional neural network (CNN) algorithms can achieve >99% prediction accuracy from LSB to MSB in the SAR ADC without protection. With the proposed protection, the bit-wise accuracy drops to around 50%.","PeriodicalId":207435,"journal":{"name":"2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131926199","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

KEATON: Assertion-guided Attack on Combinational and Sequential Locking without Scan Access 基顿:对没有扫描访问的组合和顺序锁定的断言引导攻击

2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) Pub Date : 2022-12-14 DOI: 10.1109/AsianHOST56390.2022.10022158

Mahmudul Hasan, Tamzidul Hoque

{"title":"KEATON: Assertion-guided Attack on Combinational and Sequential Locking without Scan Access","authors":"Mahmudul Hasan, Tamzidul Hoque","doi":"10.1109/AsianHOST56390.2022.10022158","DOIUrl":"https://doi.org/10.1109/AsianHOST56390.2022.10022158","url":null,"abstract":"Combinational and sequential locking methods are promising solutions for protecting hardware intellectual property (IP) from piracy, reverse engineering, and malicious modifications by locking the functionality of the IP based on a secret key. To improve their security, researchers are developing attack methods to extract the secret key. While the attacks on combinational locking are mostly inapplicable for sequential designs without access to the scan chain, the limited applicable attacks are generally evaluated against the basic random insertion of key gates. On the other hand, attacks on sequential locking techniques suffer from scalability issues and evaluation of improperly locked designs. Finally, while most attacks provide an approximately correct key, they do not indicate which specific key bits are undetermined. This paper proposes an oracle-guided attack that applies to both combinational and sequential locking without scan chain access. The attack applies light-weight design modifications that represent the oracle using a finite state machine and applies an assertion-based query of the unlocking key. We have analyzed the effectiveness of our attack against 46 sequential designs locked with various classes of combinational locking including random, strong, logic cone-based, and anti-SAT based. We further evaluated against a sequential locking technique using 46 designs with various key sequence lengths and widths. Finally, we expand our framework to identify undetermined key bits, enabling complementary attacks on the smaller remaining key space.","PeriodicalId":207435,"journal":{"name":"2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126024681","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Vulnerable PQC against Side Channel Analysis - A Case Study on Kyber 脆弱的PQC对侧信道分析-以Kyber为例

2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) Pub Date : 2022-12-14 DOI: 10.1109/AsianHOST56390.2022.10022165

Haocheng Ma, Shijian Pan, Ya Gao, Jiaji He, Yiqiang Zhao, Yier Jin

{"title":"Vulnerable PQC against Side Channel Analysis - A Case Study on Kyber","authors":"Haocheng Ma, Shijian Pan, Ya Gao, Jiaji He, Yiqiang Zhao, Yier Jin","doi":"10.1109/AsianHOST56390.2022.10022165","DOIUrl":"https://doi.org/10.1109/AsianHOST56390.2022.10022165","url":null,"abstract":"The emergence of quantum computing and its impact on current cryptographic algorithms has triggered the migration to post-quantum cryptography (PQC). Among the PQC candidates, CRYSTALS-Kyber is a key encapsulation mechanism (KEM) that stands out from the National Institute of Standards and Technology (NIST) standardization project. While software implementations of Kyber have been developed and evaluated recently, Kyber's hardware implementations, especially designs with parallel architecture, are rarely discussed. To help better understand Kyber hardware designs and their security against side-channel analysis (SCA) attacks, in this paper, we first adapt the two most recent Kyber hardware designs for FPGA implementations. We then perform SCA attacks against these hardware designs with different architectures, i.e., parallelization and pipelining. Our experimental results show that Kyber designs on FPGA boards are vulnerable to SCA attacks including electromagnetic (EM) and power side channels. An attacker only needs 27 ~ 1600 power traces or 60 ~ 2680 EM traces to recover the decryption key successfully.","PeriodicalId":207435,"journal":{"name":"2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131395844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1