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Sympiler: Transforming Sparse Matrix Codes by Decoupling Symbolic Analysis 用解耦符号分析变换稀疏矩阵码
SC17: International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2017-05-18 DOI: 10.1145/3126908.3126936
Kazem Cheshmi, S. Kamil, M. Strout, M. Dehnavi
{"title":"Sympiler: Transforming Sparse Matrix Codes by Decoupling Symbolic Analysis","authors":"Kazem Cheshmi, S. Kamil, M. Strout, M. Dehnavi","doi":"10.1145/3126908.3126936","DOIUrl":"https://doi.org/10.1145/3126908.3126936","url":null,"abstract":"Sympiler is a domain-specific code generator that optimizes sparse matrix computations by decoupling the symbolic analysis phase from the numerical manipulation stage in sparse codes. The computation patterns in sparse numerical methods are guided by the input sparsity structure and the sparse algorithm itself. In many real-world simulations, the sparsity pattern changes little or not at all. Sympiler takes advantage of these properties to symbolically analyze sparse codes at compile time and to apply inspector-guided transformations that enable applying low-level transformations to sparse codes. As a result, the Sympiler-generated code outperforms highly-optimized matrix factorization codes from commonly-used specialized libraries, obtaining average speedups over Eigen and CHOLMOD of $3.8 times$ and $1.5 times$ respectively. CCS Concepts • Software and its engineering $rightarrow$ Source code generation; • Computing methodologies $rightarrow$ Parallel programming languages;","PeriodicalId":204241,"journal":{"name":"SC17: International Conference for High Performance Computing, Networking, Storage and Analysis","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131979934","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 43
Unimem: Runtime Data Management on Non-Volatile Memory-based Heterogeneous Main Memory 基于非易失性内存的异构主存的运行时数据管理
SC17: International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2017-04-29 DOI: 10.1145/3126908.3126923
Kai Wu, Yingchao Huang, Dong Li
{"title":"Unimem: Runtime Data Management on Non-Volatile Memory-based Heterogeneous Main Memory","authors":"Kai Wu, Yingchao Huang, Dong Li","doi":"10.1145/3126908.3126923","DOIUrl":"https://doi.org/10.1145/3126908.3126923","url":null,"abstract":"Non-volatile memory (NVM) provides a scalable and power-efficient solution to replace DRAM as main memory. However, because of relatively high latency and low bandwidth of NVM, NVM is often paired with DRAM to build a heterogeneous memory system (HMS). As a result, data objects of the application must be carefully placed to NVM and DRAM for best performance. In this paper, we introduce a lightweight runtime solution that automatically and transparently manage data placement on HMS without the requirement of hardware modifications and disruptive change to applications. Leveraging online profiling and performance models, the runtime characterizes memory access patterns associated with data objects, and minimizes unnecessary data movement. Our runtime solution effectively bridges the performance gap between NVM and DRAM. We demonstrate that using NVM to replace the majority of DRAM can be a feasible solution for future HPC systems with the assistance of a software-based data management.","PeriodicalId":204241,"journal":{"name":"SC17: International Conference for High Performance Computing, Networking, Storage and Analysis","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129327129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 79
0.5 Petabyte Simulation of a 45-Qubit Quantum Circuit 45-Qubit量子电路的0.5 pb模拟
SC17: International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2017-04-04 DOI: 10.1145/3126908.3126947
Thomas Häner, Damian S. Steiger
{"title":"0.5 Petabyte Simulation of a 45-Qubit Quantum Circuit","authors":"Thomas Häner, Damian S. Steiger","doi":"10.1145/3126908.3126947","DOIUrl":"https://doi.org/10.1145/3126908.3126947","url":null,"abstract":"Near-term quantum computers will soon reach sizes that are challenging to directly simulate, even when employing the most powerful supercomputers. Yet, the ability to simulate these early devices using classical computers is crucial for calibration, validation, and benchmarking. In order to make use of the full potential of systems featuring multi- and many-core processors, we use automatic code generation and optimization of compute kernels, which also enables performance portability. We apply a scheduling algorithm to quantum supremacy circuits in order to reduce the required communication and simulate a 45-qubit circuit on the Cori II supercomputer using 8, 192 nodes and 0.5 petabytes of memory. To our knowledge, this constitutes the largest quantum circuit simulation to this date. Our highly-tuned kernels in combination with the reduced communication requirements allow an improvement in time-to-solution over state-of-the-art simulations by more than an order of magnitude at every scale. CCS CONCEPTS Applied computing $rightarrow$ Physics;","PeriodicalId":204241,"journal":{"name":"SC17: International Conference for High Performance Computing, Networking, Storage and Analysis","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115337407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 142
Scaling Betweenness Centrality using Communication-Efficient Sparse Matrix Multiplication 利用通信高效稀疏矩阵乘法缩放中间性中心性
SC17: International Conference for High Performance Computing, Networking, Storage and Analysis Pub Date : 2016-09-22 DOI: 10.1145/3126908.3126971
Edgar Solomonik, Maciej Besta, Flavio Vella, T. Hoefler
{"title":"Scaling Betweenness Centrality using Communication-Efficient Sparse Matrix Multiplication","authors":"Edgar Solomonik, Maciej Besta, Flavio Vella, T. Hoefler","doi":"10.1145/3126908.3126971","DOIUrl":"https://doi.org/10.1145/3126908.3126971","url":null,"abstract":"Betweenness centrality (BC) is a crucial graph problem that measures the significance of a vertex by the number of shortest paths leading through it. We propose Maximal Frontier Betweenness Centrality (MFBC): a succinct BC algorithm based on novel sparse matrix multiplication routines that performs a factor of $p^{1/3}$ less communication on p processors than the best known alternatives, for graphs with n vertices and average degree $k=n/p^{2/3}$. We formulate, implement, and prove the correctness of MFBC for weighted graphs by leveraging monoids instead of semirings, which enables a surprisingly succinct formulation. MFBC scales well for both extremely sparse and relatively dense graphs. It automatically searches a space of distributed data decompositions and sparse matrix multiplication algorithms for the most advantageous configuration. The MFBC implementation outperforms the well-known CombBLAS library by up to 8x and shows more robust performance. Our design methodology is readily extensible to other graph problems. CCS CONCEPTS • Theory of computation → Massively parallel algorithms; • Mathematics of computing → Mathematical software performance; • Computing methodologies → Algebraic algorithms; Massively parallel algorithms;","PeriodicalId":204241,"journal":{"name":"SC17: International Conference for High Performance Computing, Networking, Storage and Analysis","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131670872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 71
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