2016 International Conference on Information Systems Engineering (ICISE)最新文献

Use of Reality Mining Dataset for Human Behavior Analysis -- A Survey 现实挖掘数据集在人类行为分析中的应用——综述

2016 International Conference on Information Systems Engineering (ICISE) Pub Date : 2016-04-20 DOI: 10.1109/ICISE.2016.16

B. Padmaja, Rama Prasad, Sunitha K, V. N. Principal, Bvrit Hyderabad

引用次数: 2

An Elastic VoIP Solution Based on OpenStack 基于OpenStack的弹性VoIP解决方案

2016 International Conference on Information Systems Engineering (ICISE) Pub Date : 2016-04-20 DOI: 10.1109/ICISE.2016.8

Victor Gonzalez Chamorro, Carlos Núñez Castillo, Fabio López-Pires

{"title":"An Elastic VoIP Solution Based on OpenStack","authors":"Victor Gonzalez Chamorro, Carlos Núñez Castillo, Fabio López-Pires","doi":"10.1109/ICISE.2016.8","DOIUrl":"https://doi.org/10.1109/ICISE.2016.8","url":null,"abstract":"Nowadays, a datacenter infrastructure with static al- location of resources could be a bottleneck towards a high-quality network service due to growing and unpredictable demands for resources by modern applications. Additionally, an efficient utilization of the available resources could represent economical benefits to service providers. In this context, Voice over IP (VoIP) service providers must address resource management problems such as: (1) efficient utilization of available resources and (2) maintain high quality of service, considering particular requirements of the communication business. VoIP solutions could be designed considering different cloud computing service models, where the adaptation of traditional applications to cloud computing environments is a main challenge. As an innovative use of Infrastructure as a Service (IaaS) interfaces, this work presents a cloud-based elastic VoIP solution considering its implementation on an industry-leading cloud platform such as OpenStack. In order to validate the proposed solution, several experiments with different workloads were performed. Experimental results show that the proposed elastic VoIP solution can efficiently use available resources and dynamically scale according to service workload demands while maintaining a high-quality of service.","PeriodicalId":190643,"journal":{"name":"2016 International Conference on Information Systems Engineering (ICISE)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115213087","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Impact of Bug Reporter's Reputation on Bug-Fix Times Bug报告者的声誉对Bug修复时间的影响

2016 International Conference on Information Systems Engineering (ICISE) Pub Date : 2016-04-20 DOI: 10.1109/ICISE.2016.18

Pranav Ramarao, K. Muthukumaran, Siddharth Dash, N. L. Bhanu Murthy

引用次数: 7

High Secured Low Power Multiplexer-LUT Based AES S-Box Implementation 基于AES S-Box的高安全低功耗多路复用器实现

2016 International Conference on Information Systems Engineering (ICISE) Pub Date : 2016-04-20 DOI: 10.1109/ICISE.2016.11

Ali Akbar Pammu, Kwen-Siong Chong, K. Z. L. Ne, B. Gwee

{"title":"High Secured Low Power Multiplexer-LUT Based AES S-Box Implementation","authors":"Ali Akbar Pammu, Kwen-Siong Chong, K. Z. L. Ne, B. Gwee","doi":"10.1109/ICISE.2016.11","DOIUrl":"https://doi.org/10.1109/ICISE.2016.11","url":null,"abstract":"We propose a Multiplexer Look-Up-Table (MLUT) based Substitution-Box (S-Box) implementation for the Advanced Encryption Standard (AES) algorithm. There are two key features in the proposed MLUT based S-Box. First, it is implemented based on 256-byte to 1-byte multiplexer with a 256-byte memory instead of the conventional implementation of employing multiplication inversion in GF(28) and affine transformation. Thus, our proposed S-Box is simpler in circuit implementation and lower in power dissipation. Second, our S-Box is 30× more secured against the Side Channel Attack (SCA) based on Correlation Power Analysis (CPA), as our proposed S-Box exhibits smaller variance in its power dissipation profile for different processed data. Based on the measurement results of AES-128 implemented on the Sakura-X FPGA board, our proposed S-Box dissipates only 1.9mW and features 5.5× lower power than the conventional S-Box implementation. Our proposed MLUT S-Box design is also highly secured as the CPA attack on the AES with our proposed S-Box implementation requires 13540 power traces. This is significantly higher than the conventional S-Box which requires only 445 power traces to uncover the same secrete key.","PeriodicalId":190643,"journal":{"name":"2016 International Conference on Information Systems Engineering (ICISE)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126615260","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 21

Measuring System Usability during Requirement Engineering: Requirements Engineering 在需求工程期间测量系统可用性:需求工程

2016 International Conference on Information Systems Engineering (ICISE) Pub Date : 2016-04-20 DOI: 10.1109/ICISE.2016.20

Gregory C. Smoots, Andreas Garstenauer, T. Blackburn

{"title":"Measuring System Usability during Requirement Engineering: Requirements Engineering","authors":"Gregory C. Smoots, Andreas Garstenauer, T. Blackburn","doi":"10.1109/ICISE.2016.20","DOIUrl":"https://doi.org/10.1109/ICISE.2016.20","url":null,"abstract":"It is extensively acknowledged that Requirements Engineering (RE) has critical implication for overall success of program and project systems development. This research examines and presents a framework that demonstrates how System Usability can be measured to improve decision-making during RE phases as valuable input to feed-follow-on Systems Engineering (SE) activities throughout system development life cycle stages. This paper discusses research for a systematic approach in developing a decision framework based upon four major requirement specification factors: requirement text quality, complexity, completeness and capacity to identify system usability prior to being delivered into system operations per documented requirement specification. The objective of the research is to identify the utility of the defined stakeholder requirements during the earliest stages of system development to measure system usability prior to investing or allocating significant resources to deliver an end-system that satisfies customer expectations. The decision framework is a convergence of multiple fields of research that include requirements text analysis, quality attributes, problem complexity, and requirements metrics as input for decision analysis to assist researchers and practitioners with delivery of end-systems that meet the stakeholder expectations. The operational specification statements within requirement documentation will be analyzed to measure text quality attributes for metrics. The decision framework bridges the gap amongst the stakeholder and system engineer during RE phases to identify issues on the front of the systems engineering process to develop quality end-systems.","PeriodicalId":190643,"journal":{"name":"2016 International Conference on Information Systems Engineering (ICISE)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125909894","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

On the Windy Road to Become a Service Provider: Reflections from Designing a Mission Critical Information System Provided as a Service 在成为服务提供者的风路上:设计作为服务提供的关键任务信息系统的思考

2016 International Conference on Information Systems Engineering (ICISE) Pub Date : 2016-04-20 DOI: 10.1109/ICISE.2016.10

Aapo Koski, T. Mikkonen

引用次数: 2

Combining SysML and Marte/CCSL to Model Complex Electronic Systems 结合SysML和Marte/CCSL对复杂电子系统建模

2016 International Conference on Information Systems Engineering (ICISE) Pub Date : 2016-04-20 DOI: 10.1109/ICISE.2016.13

A. Khan, F. Mallet, M. Rashid

引用次数: 10

Using Velocity, Acceleration, and Jerk to Manage Agile Schedule Risk 使用速度、加速和波动来管理敏捷进度风险

2016 International Conference on Information Systems Engineering (ICISE) Pub Date : 2016-04-20 DOI: 10.1109/ICISE.2016.21

Karen M. Bumbary

{"title":"Using Velocity, Acceleration, and Jerk to Manage Agile Schedule Risk","authors":"Karen M. Bumbary","doi":"10.1109/ICISE.2016.21","DOIUrl":"https://doi.org/10.1109/ICISE.2016.21","url":null,"abstract":"Stable velocity is paramount for agile planning and builds trust with stakeholders. What metric represents agile stability? Agile processes establish the principle the schedule is fixed and scope changes. Agile velocity is well defined. Velocity is how much technical scope a team of people can produce over a period of time. It ties the technical scope to the schedule. This research continues to develop the concept that a stable velocity is an important factor in the change management process and risk management process. Specifically, stable velocity can help prevent a chaotic relationship with the customer. If the velocity is stable from sprint to sprint, it means planning and the execution is well aligned. This research uses past data from software agile development projects to investigate whether a metric for change in technical scope provides a leading indicator for schedule risk. Specifically, this paper studies agile velocity and proposes two physics concepts derived from velocity, as new agile metrics: agile acceleration and agile jerk. This paper identifies agile acceleration as a trigger for change and agile jerk as an indicator for stability of a release. The process to incorporate the metrics into agile risk management is provided. This research is relevant to persons who participate and manage Agile development projects. This research can be used to understand potential schedule risk/opportunity associated with unfinished work returning to the product backlog for later planning.","PeriodicalId":190643,"journal":{"name":"2016 International Conference on Information Systems Engineering (ICISE)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133699671","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

High Speed True Random Number Generator Based on FPGA 基于FPGA的高速真随机数发生器

2016 International Conference on Information Systems Engineering (ICISE) Pub Date : 2016-04-20 DOI: 10.1109/ICISE.2016.14

XiuFeng Xu, Yuyang Wang

引用次数: 17

Modeling Parallelization Overheads for Predicting Performance 预测性能的建模并行化开销

2016 International Conference on Information Systems Engineering (ICISE) Pub Date : 2016-04-20 DOI: 10.1109/ICISE.2016.19

Priti Ranadive, Vinay G. Vaidya

{"title":"Modeling Parallelization Overheads for Predicting Performance","authors":"Priti Ranadive, Vinay G. Vaidya","doi":"10.1109/ICISE.2016.19","DOIUrl":"https://doi.org/10.1109/ICISE.2016.19","url":null,"abstract":"Legacy codes primarily exist on a single core processor. With the proliferation of multicore processors, end users often want to migrate to new platforms to improve performance or reduce execution time of the application. Migration from a single core processor to multicore is an expensive proposition. Thus, end users often want to get some idea about possible performance benefit prior to actual migration. Parallelizing a given application often leads to overheads due to the very constructs that enable parallelization. These overheads reduce performance of the application. In this paper, we analyze the overheads caused by OpenMP parallelization constructs. We further provide guidelines to programmers on how to reduce these overheads and maximize the performance benefits of parallelization. We start our analysis by using motivational examples, create a model and then validate our model with benchmark codes. Our experiments show that the following factors affect overheads: 1) type and scope of arrays, 2) array access w.r.t. the overall data flow, 3) number of iterations, and 4) the chunk sizes during execution. Based on our experiments we propose a mathematical model for predicting the number of cycles for these overheads. We use this model to predict overheads of four benchmark codes. Our results show that the error between the number of cycles predicted and observed is on an average 8.22%.","PeriodicalId":190643,"journal":{"name":"2016 International Conference on Information Systems Engineering (ICISE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129697246","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2