2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing最新文献

Secure Scan Design with Dynamically Configurable Connection 安全扫描设计与动态可配置的连接

2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing Pub Date : 2013-12-02 DOI: 10.1109/PRDC.2013.47

Yuta Atobe, Youhua Shi, M. Yanagisawa, N. Togawa

引用次数: 30

Analyzing Reliability of Memory Sub-systems with Double-Chipkill Detect/Correct 基于双芯片kill检测/校正的存储子系统可靠性分析

2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing Pub Date : 2013-12-02 DOI: 10.1109/PRDC.2013.18

Xun Jian, Nathan Debardeleben, S. Blanchard, Vilas Sridharan, Rakesh Kumar

{"title":"Analyzing Reliability of Memory Sub-systems with Double-Chipkill Detect/Correct","authors":"Xun Jian, Nathan Debardeleben, S. Blanchard, Vilas Sridharan, Rakesh Kumar","doi":"10.1109/PRDC.2013.18","DOIUrl":"https://doi.org/10.1109/PRDC.2013.18","url":null,"abstract":"Chip kill correct is an advanced type of error correction used in memory sub-systems. Existing analytical approaches for modeling the reliability of memory sub-systems with chipkill correct are limited to those with chip kill-correct solutions that guarantee correction of errors in a single DRAM device. However, stronger chip kill correct solutions that are capable of guaranteeing the detection and even correction of errors in up to two DRAM devices have become common in existing HPC systems. Analytical reliability models are needed for such memory subsystems. This paper proposes analytical models for the reliability of double-chipkill detect and/or correct. Validation against Monte Carlo simulations shows that the output of our analytical models are within 3.9% of Monte Carlo simulations, on average. We used the analytical models to study various aspects of the reliability of memory sub-systems protected by double-chip kill detect and/or correct. Our studies provide several insights into the dependence of reliability of these systems on scale, device fault rate, memory organization, and memory-scrubbing policy.","PeriodicalId":187326,"journal":{"name":"2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130109846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

Probabilistic Modeling of Failure Dependencies Using Markov Logic Networks 基于马尔可夫逻辑网络的故障相关性概率建模

2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing Pub Date : 2013-12-02 DOI: 10.1109/PRDC.2013.35

Shalini Ghosh, W. Steiner, G. Denker, P. Lincoln

{"title":"Probabilistic Modeling of Failure Dependencies Using Markov Logic Networks","authors":"Shalini Ghosh, W. Steiner, G. Denker, P. Lincoln","doi":"10.1109/PRDC.2013.35","DOIUrl":"https://doi.org/10.1109/PRDC.2013.35","url":null,"abstract":"We present a methodology for the probabilistic modeling of failure dependencies in large, complex systems using Markov Logic Networks (MLNs), a state-of-the-art probabilistic relational modeling technique in machine learning. We illustrate this modeling methodology on example system architectures, and show how the the Probabilistic Consistency Engine (PCE) tool can create and analyze failure-dependency models. We compare MLN-based analysis with analytical symbolic analysis to validate our approach. The latter method yields bounds on the expected system behaviors for different component-failure probabilities, but it requires closed-form representations and is therefore often an impractical approach for complex system analysis. The MLN-based method facilitates techniques of early design analysis for reliability (e.g., probabilistic sensitivity analysis). We analyze two examples - a portion of the Time-Triggered Ethernet (TTEthernet) communication platform used in space, and an architecture based on Honeywell's Cabin Air Compressor(CAC) - that highlight the value of the MLN-based approach for analyzing failure dependencies in complex cyber-physical systems.","PeriodicalId":187326,"journal":{"name":"2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127825705","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Fault-Tolerant Leader Election in Mobile Dynamic Distributed Systems 移动动态分布式系统中的容错领导者选举

2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing Pub Date : 2013-12-02 DOI: 10.1109/PRDC.2013.17

Carlos Gómez-Calzado, A. Lafuente, M. Larrea, M. Raynal

引用次数: 34

Assessment Criteria for Cloud Identity Management Systems 云身份管理系统评估标准

2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing Pub Date : 2013-12-02 DOI: 10.1109/PRDC.2013.39

U. Habiba, Abdul Ghafoor Abbasi, Rahat Masood, M. A. Shibli

{"title":"Assessment Criteria for Cloud Identity Management Systems","authors":"U. Habiba, Abdul Ghafoor Abbasi, Rahat Masood, M. A. Shibli","doi":"10.1109/PRDC.2013.39","DOIUrl":"https://doi.org/10.1109/PRDC.2013.39","url":null,"abstract":"Cloud computing offers many benefits to the IT industry by making available the services and resources that helps them to proliferate or decrease their organizational resources automatically on demand. On the other hand, organizations are still uncertain about the security and privacy of their sensitive information (for instance the identity credentials) in the multitenant environment of the Cloud. Many security systems have been devised for the protection of resources in Cloud environments. Identity Management Systems, in this regard, play a vital role in ensuring effective user authentication, provisioning, de-provisioning and access control decisions. Many Cloud IDMSs have been proposed until now claiming to offer flexibility, agility and robustness. However, no comparative analysis of such Cloud based IDMSs has been performed so far, as to the best of our knowledge there exists no specific criteria against which one can evaluate an IDMS on Cloud. This paper proposes an assessment criterion for the evaluation of Cloud based IDMSs, comprising of potential security features that are positively imminent for the assessment of Cloud based IDMSs. Furthermore, analysis of Cloud IDMSs is presented based on the proposed assessment criteria. Potential research directions in the area of Cloud identity management and security are also discussed.","PeriodicalId":187326,"journal":{"name":"2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129778804","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Towards Formal Approaches to System Resilience 迈向系统弹性的正式方法

2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing Pub Date : 2013-12-02 DOI: 10.1109/PRDC.2013.14

V. Sharma, Arvind Haran, Zvonimir Rakamaric, G. Gopalakrishnan

{"title":"Towards Formal Approaches to System Resilience","authors":"V. Sharma, Arvind Haran, Zvonimir Rakamaric, G. Gopalakrishnan","doi":"10.1109/PRDC.2013.14","DOIUrl":"https://doi.org/10.1109/PRDC.2013.14","url":null,"abstract":"Technology scaling and techniques such as dynamic voltage/frequency scaling are predicted to increase the number of transient faults in future processors. Error detectors implemented in hardware are often energy inefficient, as they are \"always on.\" While software-level error detection can augment hardware-level detectors, creating detectors in software that are highly effective remains a challenge. In this paper, we first present anew LLVM-level fault injector called KULFI that helps simulate faults occurring within CPU state elements in a versatile manner. Second, using KULFI, we study the behavior of a family of well-known and simple algorithms under error injection. (We choose a family of sorting algorithms for this study.) We then propose a promising way to interpret our empirical results using a formal model that builds on the idea of predicate state transition diagrams. After introducing the basic abstraction underlying our predicate transition diagrams, we draw connections to the level of resilience empirically observed during fault injection studies. Building on the observed connections, we develop a simple, and yet effective, predicate-abstraction-based fault detector. While in its initial stages, ours is believed to be the first study that offers a formal way to interpret and compare fault injection results obtained from algorithms from within one family. Given the absolutely unpredictable nature of what a fault can do to a computation in general, our approach may help designers choose amongst a class of algorithms one that behaves most resilient of all.","PeriodicalId":187326,"journal":{"name":"2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing","volume":"28 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127207942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 69

Survivability Evaluation of Fluid Critical Infrastructures Using Hybrid Petri Nets 基于混合Petri网的流体关键基础设施生存性评价

2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing Pub Date : 2013-12-02 DOI: 10.1109/PRDC.2013.34

H. Ghasemieh, Anne Remke, B. Haverkort

引用次数: 23

Acceleration of Random Testing for Software 软件随机测试加速

2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing Pub Date : 2013-12-02 DOI: 10.1109/PRDC.2013.15

Shengfeng Wu, Yue Wu, Shiyi Xu

引用次数: 4

Power of One Bit: Increasing Error Correction Capability with Data Inversion 一比特的威力:通过数据反转提高纠错能力

2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing Pub Date : 2013-12-02 DOI: 10.1109/PRDC.2013.42

R. Maddah, Sangyeun Cho, R. Melhem

{"title":"Power of One Bit: Increasing Error Correction Capability with Data Inversion","authors":"R. Maddah, Sangyeun Cho, R. Melhem","doi":"10.1109/PRDC.2013.42","DOIUrl":"https://doi.org/10.1109/PRDC.2013.42","url":null,"abstract":"Phase-change memory (PCM) has emerged as a candidate that overcomes the physical limitations faced by DRAM and NAND flash memory. While PCM has desirable properties in terms of scalability and energy, it suffers from limited endurance. Repeated writes cause PCM cells to wear out and get permanently stuck at either 0 or 1. Recovering from stuck-at faults through a proactive error correction scheme is essential for the widespread adoption of PCM. In this paper, we propose data inversion as a practical technique to increase the number of faults that an error correction code can cover. Since stuck-at cells can still be read, errors are manifested only when a worn-out cell is programmed with a bit value different than the value it is stuck at. After a write operation fails for a given block of data, data inversion attempts another write operation with all original data bits inverted. Inverting the data is likely to bring the number of errors within the nominal capability of the deployed error correction code. Requiring only one additional auxiliary bit, data inversion can double the capability of an error correction code and extends the lifetime by up to 34.5%.","PeriodicalId":187326,"journal":{"name":"2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134551414","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

EDFI: A Dependable Fault Injection Tool for Dependability Benchmarking Experiments 用于可靠性基准测试实验的可靠故障注入工具

2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing Pub Date : 2013-12-02 DOI: 10.1109/PRDC.2013.12

Cristiano Giuffrida, A. Kuijsten, A. Tanenbaum

引用次数: 46