Low-Power Circuits for Emerging Applications in Communications, Computing, and Sensing最新文献

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Exploiting Time: The Intersection Point of Multidisciplines and the Next Challenge and Opportunity in the Making of Electronics 利用时间:多学科的交叉点和电子制造的下一个挑战和机遇
Liming Xiu
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引用次数: 0
On-Chip Regulators for Low-Voltage and Portable Systems-on-Chip 用于低压和便携式片上系统的片上稳压器
E. Salman
{"title":"On-Chip Regulators for Low-Voltage and Portable Systems-on-Chip","authors":"E. Salman","doi":"10.1201/9780429507564-3","DOIUrl":"https://doi.org/10.1201/9780429507564-3","url":null,"abstract":"3.","PeriodicalId":179579,"journal":{"name":"Low-Power Circuits for Emerging Applications in Communications, Computing, and Sensing","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128011822","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Aging Evaluation and Mitigation Techniques Targeting FPGA Devices 针对FPGA器件的老化评估与缓解技术
I. Stratakos, Konstantinos Maragos, D. Soudris, K. Siozios, G. Lentaris
{"title":"Aging Evaluation and Mitigation Techniques Targeting FPGA Devices","authors":"I. Stratakos, Konstantinos Maragos, D. Soudris, K. Siozios, G. Lentaris","doi":"10.1201/9780429507564-7","DOIUrl":"https://doi.org/10.1201/9780429507564-7","url":null,"abstract":"Field Programmable Gate Arrays (FPGAs) gain momentum in the field of high performance and low power digital systems and in order to be able to handle diverse needs, based on the application field they are used, the latest fabrication processes and CMOS technology nodes are employed to produce the best possible device. However with the decrease in transistor feature size, the introduction of new materials and the new fabrication procedures, variation and transistor aging effects become more severe. The consequences of these are a noticeable degradation on the performance of FPGA devices and renders them unreliable after a long operation time. Especially aging, which is related directly to device operation and environmental conditions, becomes one of the major factors of permanent faults in digital systems. In this chapter a presentation of the mechanisms behind aging (e.g. BTI, HCI, TDDB, Electromigration) is given and how the research community propose methods to evaluate aging on an FPGA device. Moreover, an brief overview of aging mitigation strategies targeting FPGAs are presented, which if used in a appropriate manner can increase the lifetime of an FPGA device, as well as the its reliability.","PeriodicalId":179579,"journal":{"name":"Low-Power Circuits for Emerging Applications in Communications, Computing, and Sensing","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127934438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Clock Generation and Distribution for Low-Power Digital Systems 低功耗数字系统时钟的产生和分配
M. Cochet, Guénolé Lallement, F. Abouzeid, P. Roche
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引用次数: 0
Design of Low Standby Power Fully Integrated Voltage Regulators 低待机功率全集成稳压器的设计
Yan Lu, R. Martins
{"title":"Design of Low Standby Power Fully Integrated Voltage Regulators","authors":"Yan Lu, R. Martins","doi":"10.1201/9780429507564-2","DOIUrl":"https://doi.org/10.1201/9780429507564-2","url":null,"abstract":"","PeriodicalId":179579,"journal":{"name":"Low-Power Circuits for Emerging Applications in Communications, Computing, and Sensing","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127323191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Cost-Effective TAF-DPS Syntonization Scheme of Improving Clock Frequency Accuracy and Long-Term Frequency Stability for Universal Applications 一种经济有效的TAF-DPS同步方案,可提高时钟频率精度和长期频率稳定性
Liming Xiu, Pao-Lung Chen, Yongguo Han
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引用次数: 0
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