I. Stratakos, Konstantinos Maragos, D. Soudris, K. Siozios, G. Lentaris
{"title":"针对FPGA器件的老化评估与缓解技术","authors":"I. Stratakos, Konstantinos Maragos, D. Soudris, K. Siozios, G. Lentaris","doi":"10.1201/9780429507564-7","DOIUrl":null,"url":null,"abstract":"Field Programmable Gate Arrays (FPGAs) gain momentum in the field of high performance and low power digital systems and in order to be able to handle diverse needs, based on the application field they are used, the latest fabrication processes and CMOS technology nodes are employed to produce the best possible device. However with the decrease in transistor feature size, the introduction of new materials and the new fabrication procedures, variation and transistor aging effects become more severe. The consequences of these are a noticeable degradation on the performance of FPGA devices and renders them unreliable after a long operation time. Especially aging, which is related directly to device operation and environmental conditions, becomes one of the major factors of permanent faults in digital systems. In this chapter a presentation of the mechanisms behind aging (e.g. BTI, HCI, TDDB, Electromigration) is given and how the research community propose methods to evaluate aging on an FPGA device. Moreover, an brief overview of aging mitigation strategies targeting FPGAs are presented, which if used in a appropriate manner can increase the lifetime of an FPGA device, as well as the its reliability.","PeriodicalId":179579,"journal":{"name":"Low-Power Circuits for Emerging Applications in Communications, Computing, and Sensing","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Aging Evaluation and Mitigation Techniques Targeting FPGA Devices\",\"authors\":\"I. Stratakos, Konstantinos Maragos, D. Soudris, K. Siozios, G. Lentaris\",\"doi\":\"10.1201/9780429507564-7\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Field Programmable Gate Arrays (FPGAs) gain momentum in the field of high performance and low power digital systems and in order to be able to handle diverse needs, based on the application field they are used, the latest fabrication processes and CMOS technology nodes are employed to produce the best possible device. However with the decrease in transistor feature size, the introduction of new materials and the new fabrication procedures, variation and transistor aging effects become more severe. The consequences of these are a noticeable degradation on the performance of FPGA devices and renders them unreliable after a long operation time. Especially aging, which is related directly to device operation and environmental conditions, becomes one of the major factors of permanent faults in digital systems. In this chapter a presentation of the mechanisms behind aging (e.g. BTI, HCI, TDDB, Electromigration) is given and how the research community propose methods to evaluate aging on an FPGA device. Moreover, an brief overview of aging mitigation strategies targeting FPGAs are presented, which if used in a appropriate manner can increase the lifetime of an FPGA device, as well as the its reliability.\",\"PeriodicalId\":179579,\"journal\":{\"name\":\"Low-Power Circuits for Emerging Applications in Communications, Computing, and Sensing\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-12-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Low-Power Circuits for Emerging Applications in Communications, Computing, and Sensing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1201/9780429507564-7\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Low-Power Circuits for Emerging Applications in Communications, Computing, and Sensing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1201/9780429507564-7","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Aging Evaluation and Mitigation Techniques Targeting FPGA Devices
Field Programmable Gate Arrays (FPGAs) gain momentum in the field of high performance and low power digital systems and in order to be able to handle diverse needs, based on the application field they are used, the latest fabrication processes and CMOS technology nodes are employed to produce the best possible device. However with the decrease in transistor feature size, the introduction of new materials and the new fabrication procedures, variation and transistor aging effects become more severe. The consequences of these are a noticeable degradation on the performance of FPGA devices and renders them unreliable after a long operation time. Especially aging, which is related directly to device operation and environmental conditions, becomes one of the major factors of permanent faults in digital systems. In this chapter a presentation of the mechanisms behind aging (e.g. BTI, HCI, TDDB, Electromigration) is given and how the research community propose methods to evaluate aging on an FPGA device. Moreover, an brief overview of aging mitigation strategies targeting FPGAs are presented, which if used in a appropriate manner can increase the lifetime of an FPGA device, as well as the its reliability.