发布求助
文献互助 智能选刊 最新文献

Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme最新文献

筛选
英文 中文
Synthese von Komplexgatter-Schaltnetzen unter Berücksichtigung der Transistoranzahl 根据交汇口的数量而通过复杂的气输送网合成
Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme Pub Date : 1990-10-01 DOI: 10.1007/978-3-642-84304-4_4
Christian Wolters
{"title":"Synthese von Komplexgatter-Schaltnetzen unter Berücksichtigung der Transistoranzahl","authors":"Christian Wolters","doi":"10.1007/978-3-642-84304-4_4","DOIUrl":"https://doi.org/10.1007/978-3-642-84304-4_4","url":null,"abstract":"","PeriodicalId":158631,"journal":{"name":"Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121454692","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimierung von Schaltungen mit determinierten und statistischen Suchverfahren 优化利用指定色彩搜索程序的电路
Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme Pub Date : 1990-10-01 DOI: 10.1007/978-3-642-84304-4_23
E. Lüder, Joerg Schaepperle
{"title":"Optimierung von Schaltungen mit determinierten und statistischen Suchverfahren","authors":"E. Lüder, Joerg Schaepperle","doi":"10.1007/978-3-642-84304-4_23","DOIUrl":"https://doi.org/10.1007/978-3-642-84304-4_23","url":null,"abstract":"","PeriodicalId":158631,"journal":{"name":"Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122999857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Parallele Simulatoren für VLSI - Stand und Zukunftslinien des DISIM-Systems 模拟透视系统的盘旋和将来一览器的模拟空间
Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme Pub Date : 1990-10-01 DOI: 10.1007/978-3-642-84304-4_20
E. Aposporidis, W. Jud, F. Lohnert
{"title":"Parallele Simulatoren für VLSI - Stand und Zukunftslinien des DISIM-Systems","authors":"E. Aposporidis, W. Jud, F. Lohnert","doi":"10.1007/978-3-642-84304-4_20","DOIUrl":"https://doi.org/10.1007/978-3-642-84304-4_20","url":null,"abstract":"","PeriodicalId":158631,"journal":{"name":"Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121025566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
CASCH - ein Scheduling-Algorithmus für "High-Level"-Synthese CASCH -一个用于“高级别”合成的sheduling算法
Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme Pub Date : 1990-10-01 DOI: 10.1007/978-3-642-84304-4_13
P. Gutberlet, Heinrich Krämer, W. Rosenstiel
{"title":"CASCH - ein Scheduling-Algorithmus für \"High-Level\"-Synthese","authors":"P. Gutberlet, Heinrich Krämer, W. Rosenstiel","doi":"10.1007/978-3-642-84304-4_13","DOIUrl":"https://doi.org/10.1007/978-3-642-84304-4_13","url":null,"abstract":"","PeriodicalId":158631,"journal":{"name":"Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133251410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Automatisierter Entwurf von Schaltungen für die schnelle digitale Signalverarbeitung 远程遥控电路处理系统
Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme Pub Date : 1990-10-01 DOI: 10.1007/978-3-642-84304-4_22
Uwe Vehlies, Andreas Münzner
{"title":"Automatisierter Entwurf von Schaltungen für die schnelle digitale Signalverarbeitung","authors":"Uwe Vehlies, Andreas Münzner","doi":"10.1007/978-3-642-84304-4_22","DOIUrl":"https://doi.org/10.1007/978-3-642-84304-4_22","url":null,"abstract":"","PeriodicalId":158631,"journal":{"name":"Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130304335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Hierarchical Netlist Extraction and Design Rule Check 分层网表提取和设计规则检查
Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme Pub Date : 1990-10-01 DOI: 10.1007/978-3-642-84304-4_2
W. Meier
{"title":"Hierarchical Netlist Extraction and Design Rule Check","authors":"W. Meier","doi":"10.1007/978-3-642-84304-4_2","DOIUrl":"https://doi.org/10.1007/978-3-642-84304-4_2","url":null,"abstract":"","PeriodicalId":158631,"journal":{"name":"Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114471194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Diffusion - An analytic procedure applied to global macro cell placment 扩散-一个分析程序，适用于全局宏细胞安置
Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme Pub Date : 1990-10-01 DOI: 10.1007/978-3-642-84304-4_7
P. V. Kraus, D. Mlynski, C. Kyung
{"title":"Diffusion - An analytic procedure applied to global macro cell placment","authors":"P. V. Kraus, D. Mlynski, C. Kyung","doi":"10.1007/978-3-642-84304-4_7","DOIUrl":"https://doi.org/10.1007/978-3-642-84304-4_7","url":null,"abstract":"","PeriodicalId":158631,"journal":{"name":"Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134174918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Das Simulatorkopplungsprojekt 这Simulatorkopplungsprojekt
Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme Pub Date : 1990-10-01 DOI: 10.1007/978-3-642-84304-4_21
Michael Bechtold, T. Leyendecker, M. Niemeyer, A. Oczko, Christel Oczko
{"title":"Das Simulatorkopplungsprojekt","authors":"Michael Bechtold, T. Leyendecker, M. Niemeyer, A. Oczko, Christel Oczko","doi":"10.1007/978-3-642-84304-4_21","DOIUrl":"https://doi.org/10.1007/978-3-642-84304-4_21","url":null,"abstract":"","PeriodicalId":158631,"journal":{"name":"Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134436157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Testbarkeitsanalyse beim hierarchischen top-down Entwurf
Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme Pub Date : 1990-10-01 DOI: 10.1007/978-3-642-84304-4_16
Ernst J. Lehner, H. Hofestädt
{"title":"Testbarkeitsanalyse beim hierarchischen top-down Entwurf","authors":"Ernst J. Lehner, H. Hofestädt","doi":"10.1007/978-3-642-84304-4_16","DOIUrl":"https://doi.org/10.1007/978-3-642-84304-4_16","url":null,"abstract":"","PeriodicalId":158631,"journal":{"name":"Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129451553","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
ATTACC - an Automated Tool for Timing Analysis and Cell Characterization ATTACC -一个用于定时分析和细胞表征的自动化工具
Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme Pub Date : 1990-10-01 DOI: 10.1007/978-3-642-84304-4_19
T. Schwederski, T. Büchner, W. Haas, M. Zahn
{"title":"ATTACC - an Automated Tool for Timing Analysis and Cell Characterization","authors":"T. Schwederski, T. Büchner, W. Haas, M. Zahn","doi":"10.1007/978-3-642-84304-4_19","DOIUrl":"https://doi.org/10.1007/978-3-642-84304-4_19","url":null,"abstract":"","PeriodicalId":158631,"journal":{"name":"Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130129383","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信