International Journal of Electrical and Electronics Research最新文献

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Wind Energy Conversion System using Cascading H-Bridge Multilevel Inverter in High Ripple Scenario 高纹波情况下使用级联 H 桥多级逆变器的风能转换系统
International Journal of Electrical and Electronics Research Pub Date : 2024-03-15 DOI: 10.37391/ijeer.120126
Chellam S, K. S., Jasmine Gnanamalar A
{"title":"Wind Energy Conversion System using Cascading H-Bridge Multilevel Inverter in High Ripple Scenario","authors":"Chellam S, K. S., Jasmine Gnanamalar A","doi":"10.37391/ijeer.120126","DOIUrl":"https://doi.org/10.37391/ijeer.120126","url":null,"abstract":"This paper presents wind energy conversion system using CHB MLI and phase interleaved boost converter to overcome high voltage and current ripple. Developments in power electronics technology have a direct impact on advances in wind energy conversion systems. WECS output voltage may fluctuate depending on wind speed. For WECS to maintain a constant output voltage, a power converter is required. This paper explains how to configure a phase-interleaved boost converter and voltage controller to maintain a stable intermediate circuit voltage in the system. The proposed cascading H-bridge multilevel inverter (CHB MLI) converts DC/AC using a novel topology. Separate DC sources are not utilizing the suggested topology. Multi-level inverters are operated by specific harmonic disposal pulse width modulation, or SHE-PWM are utilized. PMSG voltage, CHB-MLI voltage, boost converter voltage and rotor speed have seven different levels of simulated waveforms. Among the many advantages of three-phase alternating DC-DC boost converters, that are high efficiency, fast dynamics and very low current ripple. The output voltage is increased to 400 V using a three-phase interleaving converter, which also maintains a higher efficiency of about 98%. DC-DC power converters have proven to be essential components of many applications and topologies. The interleaving technique is necessary to address the main disadvantages of DC-DC power converters: increased voltage, reduced efficiency, and rippled current. Interleaved boost converters have several advantages, including lower switching losses, lower voltage and current ripple, increased efficiency, and more. To improve the converter's overall functionality, the \"n\" parallel converter is connected through an interleaved boost converter. This paper presents a performance analysis of a multiphase alternating boost converter to reduce high voltage and current ripple. MATLAB/Simulink is used for analysis and simulation of phase-interleaved boost converters.","PeriodicalId":158560,"journal":{"name":"International Journal of Electrical and Electronics Research","volume":" 4","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140391724","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Efficient User Association Strategy for Maximizing User Satisfaction and Resource Utilization in Heterogeneous Cloud Radio Access Networks (H-CRANs) 异构云无线接入网(H-CRANs)中用户满意度和资源利用率最大化的高效用户关联策略
International Journal of Electrical and Electronics Research Pub Date : 2024-03-15 DOI: 10.37391/ijeer.120123
Ipseeta Nanda, Dr. Rekha H, Lizina Khatua, Dr. Sudhanshu Maurya, Dr Vijay Bhuria
{"title":"Efficient User Association Strategy for Maximizing User Satisfaction and Resource Utilization in Heterogeneous Cloud Radio Access Networks (H-CRANs)","authors":"Ipseeta Nanda, Dr. Rekha H, Lizina Khatua, Dr. Sudhanshu Maurya, Dr Vijay Bhuria","doi":"10.37391/ijeer.120123","DOIUrl":"https://doi.org/10.37391/ijeer.120123","url":null,"abstract":"The primary aim of this study is to present a User Association Strategy that can effectively optimize the Heterogeneous Cloud Radio Access Network (H CRAN). The primary objective of this strategy is to enhance customer satisfaction by optimizing the utilization of available network resources, such as transmission power and bandwidth. To achieve this objective, the proposed approach employs a logarithmic barrier function to address inequality constraints and transform the optimization problem into a formulation that facilitates effective convergence towards the optimal solution.","PeriodicalId":158560,"journal":{"name":"International Journal of Electrical and Electronics Research","volume":" 79","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140392064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Investigation and Reduction of Harmonic in Grid Connected PV Fed DSTATCOM System 并网光伏馈电 DSTATCOM 系统中谐波的研究与降低
International Journal of Electrical and Electronics Research Pub Date : 2024-03-15 DOI: 10.37391/ijeer.120125
K. Soujanya, Dr. J. Upendar
{"title":"Investigation and Reduction of Harmonic in Grid Connected PV Fed DSTATCOM System","authors":"K. Soujanya, Dr. J. Upendar","doi":"10.37391/ijeer.120125","DOIUrl":"https://doi.org/10.37391/ijeer.120125","url":null,"abstract":"The utilization of a photovoltaic-based distribution static compensator (PV-DSTATCOM) stands out as a prominent solution for addressing energy demand deficits and power quality challenges within contemporary power systems. This article focuses on enhancing the performance of PV-DSTATCOM to facilitate grid integration and elevate power quality standards. In the envisioned system, the power from the photovoltaic array is harnessed through the utilization of the sliding mode control, ensuring the extraction of maximum power. The performance of the PV-DSTATCOM is analyzed by using a Packed U cell 5 inverter. The control signals for the voltage-source inverter are generated using PQ control scheme. The efficacy of the proposed system is substantiated through MATLAB simulation results. The outcomes presented in this article highlight the accomplished improvement in the performance of PV-DSTATCOM, ensuring concurrent advancements in current THD.","PeriodicalId":158560,"journal":{"name":"International Journal of Electrical and Electronics Research","volume":" 24","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140391588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Compact Hardware Design and Implementation on FPGA Based Hybrid of AES and Keccak SHA3-512 for Enhancing Data Security 基于 AES 和 Keccak SHA3-512 混合技术的 FPGA 紧凑型硬件设计与实现,用于增强数据安全性
International Journal of Electrical and Electronics Research Pub Date : 2024-03-15 DOI: 10.37391/ijeer.120128
K. J. Lakshmi, G. Sreenivasulu
{"title":"A Compact Hardware Design and Implementation on FPGA Based Hybrid of AES and Keccak SHA3-512 for Enhancing Data Security","authors":"K. J. Lakshmi, G. Sreenivasulu","doi":"10.37391/ijeer.120128","DOIUrl":"https://doi.org/10.37391/ijeer.120128","url":null,"abstract":"Data security means protecting important information from unauthorised persons. In a security system, cryptography is the most secure method. Cryptography has many kinds, but the Advanced Encryption Standard (AES) is the most secure system. If combined with AES and Secure Hash Algorithm-3-512Bits (SHA3-512), it becomes compact, more secure, and more authenticated for data communications. The proposed methodology is a hybrid cryptography technique that combines AES with the SHA3-512 algorithm. This system becomes a strong, secure system and produces a strong cipher text. The proposed method AES/SHA3-512 is Hardware implementation on the Artix-7 FPGA family yields the lowest cost and highest hardware efficiency with a reduction in area usage of LUT 18.49%, Flip Flops 0.83%, and IO 3.8%. The proposed architecture is synthesised and simulated using the Vivado 2017.2 version Tool.","PeriodicalId":158560,"journal":{"name":"International Journal of Electrical and Electronics Research","volume":" 23","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140392232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Performance Analysis of ANFIS-PID Controller based Speed Regulation and Harmonic Reduction in BLDC Motor Application 无刷直流电机应用中基于 ANFIS-PID 控制器的速度调节和谐波降低性能分析
International Journal of Electrical and Electronics Research Pub Date : 2024-03-15 DOI: 10.37391/ijeer.120127
K.M.N.Chaitanya kumar Reddy, Dr. N. Kanagasabai
{"title":"Performance Analysis of ANFIS-PID Controller based Speed Regulation and Harmonic Reduction in BLDC Motor Application","authors":"K.M.N.Chaitanya kumar Reddy, Dr. N. Kanagasabai","doi":"10.37391/ijeer.120127","DOIUrl":"https://doi.org/10.37391/ijeer.120127","url":null,"abstract":"This study focuses on assessing the performance of a Proportional-Integral-Derivative (PID) controller integrated with an Adaptive Neuro-Fuzzy Inference System (ANFIS) in the context of speed regulation and harmonic reduction in Brushless DC (BLDC) motor applications. Rising BLDC motor speed elevates Total harmonic distortion (THD) due to non-linearity. THD reduction is vital for efficiency, reliability, and compliance in applications like electric vehicles, HVAC, and industrial automation, ensuring optimal performance and longevity. Through simulation-based design and implementation, the effectiveness of the ANFIS-PID controller is evaluated for achieving precise speed control and reducing harmonic distortions in a virtual environment. Various conventional control topologies are considered, with the ANFIS-PID controller demonstrating superior performance. The synergy of adaptive fuzzy logic and classic control components allows the ANFIS-PID controller to outperform others, particularly in dynamic conditions and varying motor characteristics, offering enhanced speed regulation and harmonic reduction in BLDC motor applications. Detailed simulations in MATLAB/Simulink software thoroughly assess the controller's dynamic response and its ability to accurately regulate BLDC motor speed while concurrently reducing harmonic distortions.","PeriodicalId":158560,"journal":{"name":"International Journal of Electrical and Electronics Research","volume":" 77","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140391779","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Enhancing FPGA Testing Efficiency: A PRBS-Based Approach for DSP Slices and Multipliers 提高 FPGA 测试效率:基于 PRBS 的 DSP 切片和乘法器方法
International Journal of Electrical and Electronics Research Pub Date : 2024-02-26 DOI: 10.37391/ijeer.120120
J. Bhandari, Yogesh Kumar Verma, S.K Hima Bindhu
{"title":"Enhancing FPGA Testing Efficiency: A PRBS-Based Approach for DSP Slices and Multipliers","authors":"J. Bhandari, Yogesh Kumar Verma, S.K Hima Bindhu","doi":"10.37391/ijeer.120120","DOIUrl":"https://doi.org/10.37391/ijeer.120120","url":null,"abstract":"The multiplication operations are pivotal in (Application-Specific Integrated Circuits) ASICs and Digital Signal Processors (DSPs). The integration of Field-Programmable Gate Arrays (FPGAs) into modern embedded systems, efficient Built-in Self-Tests (BISTs), particularly for complex components like DSP slices, is essential. This paper evaluates Pseudo Random Binary Sequence (PRBS) generators and checkers as BIST tools for high-speed data transfers in FPGAs. The design achieves minimal errors and remarkable efficiency with less than 4% logic utilization within available Look-Up Tables (LUTs). The testing of embedded multipliers in modern FPGAs is analyzed, shedding light on their performance. The analysis includes Built-in Self-Test (BIST), PRBS generator, PRBS checker, and Bit Error Rate (BER), providing insights into FPGA-based testing. This analysis assesses PRBS tools for high-speed FPGA data transfers. A hybrid multiplier design, featuring BIST and PRBS capabilities, notably reduces DSP slice utilization from 16% to 5%. This liberated FPGA resource enhances operational capabilities. The runtime PRBS data control at the block level design exemplifies adaptability in FPGA testing. The findings underscore PRBS-based BIST potential in FPGA testing. The hybrid multiplier not only optimizes FPGA resources but also aligns with dynamic digital system requirements. This research aids FPGA designers and engineers in advanced testing strategies for evolving embedded systems.","PeriodicalId":158560,"journal":{"name":"International Journal of Electrical and Electronics Research","volume":"23 5","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140429877","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Fault Prognosis of Induction Motor Using Multi Resolution Current Signature Analysis 利用多分辨率电流特征分析对感应电机进行故障诊断
International Journal of Electrical and Electronics Research Pub Date : 2024-02-26 DOI: 10.37391/ijeer.120119
Subash Kumar C S, Ravikrishna S, Sathiyanathan M, Arthy G
{"title":"Fault Prognosis of Induction Motor Using Multi Resolution Current Signature Analysis","authors":"Subash Kumar C S, Ravikrishna S, Sathiyanathan M, Arthy G","doi":"10.37391/ijeer.120119","DOIUrl":"https://doi.org/10.37391/ijeer.120119","url":null,"abstract":"There are various methods for the condition monitoring and this paper focuses on the multi resolution current signature analysis for fault prediction of induction motors. Variable frequency drives-based induction motors are used widely in industries. Monitoring the health of the motors is of great importance to reduce downtime and increase productivity. The multi resolution coefficients features from current signal are extracted using empirical wavelet transform. The extracted features are fed as input to artificial neural network to do prognosis on the data obtained for finding the condition of the motor. Hall Effect based system is used to measure the current signal and the features are extracted and trained to predict the condition of system using MATLAB in real time. The experimental findings reveal that the suggested technique achieves better accuracy in induction motor fault prognosis.","PeriodicalId":158560,"journal":{"name":"International Journal of Electrical and Electronics Research","volume":"12 4","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140430253","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Sustainability of precision agriculture as a proposal for the development of autonomous crops using IoT 精准农业的可持续性--利用物联网开发自主作物的建议
International Journal of Electrical and Electronics Research Pub Date : 2024-02-26 DOI: 10.37391/ijeer.120121
Pablo Catota, César Minaya, Jenny Alexandra Guzmán Acurio, Efrén Damián Alban Andrade, Ricardo Rosero
{"title":"Sustainability of precision agriculture as a proposal for the development of autonomous crops using IoT","authors":"Pablo Catota, César Minaya, Jenny Alexandra Guzmán Acurio, Efrén Damián Alban Andrade, Ricardo Rosero","doi":"10.37391/ijeer.120121","DOIUrl":"https://doi.org/10.37391/ijeer.120121","url":null,"abstract":"Agricultural activities have experienced a significant increase due to population growth; hence, the demand for food has risen to the point where prioritizing greater efficiency and quality in crop production within a short period is crucial. This paper addresses the contemporary need to design prototypes focused on optimizing natural resources, specifically in the agricultural sector, where recurring wastage of water, fertilizers, and pesticides is evident. This research proposes a comprehensive prototype incorporating a monitoring and control system managed through the IoT Arduino Cloud platform using an ESP32 development board to improve resource management from the initial germination stages to harvest. The planting phase is based on a 3D printer mechanism with three-dimensional movements controlled. The monitoring system includes real-time visualization of variables such as temperature, soil humidity, and electrical magnitudes, as well as the automation of the irrigation and fertilization system. In this regard, the results demonstrated efficient resource management in cultivation. Additionally, the photovoltaic system contributes to a more sustainable and efficient management approach.","PeriodicalId":158560,"journal":{"name":"International Journal of Electrical and Electronics Research","volume":"18 26","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140430142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Benefit Through Vehicles Passing on Highways in Electrical Power Generation 通过在高速公路上行驶的车辆获得发电效益
International Journal of Electrical and Electronics Research Pub Date : 2024-02-26 DOI: 10.37391/ijeer.120118
Firas Saaduldeen Ahmed, Zozan Hussain
{"title":"Benefit Through Vehicles Passing on Highways in Electrical Power Generation","authors":"Firas Saaduldeen Ahmed, Zozan Hussain","doi":"10.37391/ijeer.120118","DOIUrl":"https://doi.org/10.37391/ijeer.120118","url":null,"abstract":"The turbulent airflow caused by vehicular movement on highways is a source of kinetic energy for wind energy (WE) that can be utilized to power highway lighting and communications. The purpose of the current work is to design, install and measure the extent of benefit from small wind turbines along a Highway (HW) in one of the governorates of Iraq - Dohuk. In this investigation, wind speed measurements are close to a significant HW on the Dohuk-Zakho-Iraq (DZI) Road. The three positional characteristics are examined for the wind turbines' optimal position. These factors are heights above ground level, lateral distances from the road shoulder, and the wind turbines' highway-facing orientation. It is possible to supply electrical power for side lighting of external roads via vertical axis wind turbines (VAWT), which are produced from disturbances in air movement. In addition, a battery pack has been used to store energy to sustain fluctuations caused by stopped vehicle traffic and to ensure load operation in the event of a wind turbine stop. A 500W capacity vertical axis windmill is being worked on. The suggested landscaping technique has generated exceptional and long-lasting effects for a price of under 350 US dollars.","PeriodicalId":158560,"journal":{"name":"International Journal of Electrical and Electronics Research","volume":"246 5","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140428015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Modern Distribution Power Flow Controller With A PID-Fuzzy Approach : Improves The Power Quality 采用 PID-Fuzzy 方法的现代配电功率流控制器:改善电能质量
International Journal of Electrical and Electronics Research Pub Date : 2024-02-15 DOI: 10.37391/ijeer.120124
Namburi Nireekshana, N. Ravi, K. Rajesh Kumar
{"title":"A Modern Distribution Power Flow Controller With A PID-Fuzzy Approach : Improves The Power Quality","authors":"Namburi Nireekshana, N. Ravi, K. Rajesh Kumar","doi":"10.37391/ijeer.120124","DOIUrl":"https://doi.org/10.37391/ijeer.120124","url":null,"abstract":"Technological improvements have led to an increase of nonlinear loads, which in turn has a significant impact on the quality of power transmission. It is imperative that the level of energy purity conveyed by a transmission line be elevated. The key factors influencing power transmission are line impedance, sending end voltage, and receiving end voltage. Harmonic currents are made by nonlinear loads, which can cause system resonance, capacitor overloading, less efficiency, and a change in the amount of the voltage. The Distributed Power Flow Controller (DPFC) is a recently developed Flexible AC Transmission System (FACTS) device that utilizes the distributed FACTS (D-FACTS) idea. Unlike the Unified Power Flow Controller (UPFC), which employs a single large-sized three-phase series converter, the DPFC incorporates several small-sized single-phase converters.","PeriodicalId":158560,"journal":{"name":"International Journal of Electrical and Electronics Research","volume":"431 ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140455401","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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