2015 International Conference on High Performance Computing & Simulation (HPCS)最新文献_第10页

Self-optimization of power parameters in WCDMA networks WCDMA网络中功率参数的自优化

2015 International Conference on High Performance Computing & Simulation (HPCS) Pub Date : 2015-07-20 DOI: 10.1109/HPCSim.2015.7237024

Harrison Mfula, T. Isotalo, J. Nurminen

{"title":"Self-optimization of power parameters in WCDMA networks","authors":"Harrison Mfula, T. Isotalo, J. Nurminen","doi":"10.1109/HPCSim.2015.7237024","DOIUrl":"https://doi.org/10.1109/HPCSim.2015.7237024","url":null,"abstract":"Network optimization is used by operators to maximize return on investment and to ensure customer satisfaction with the quality of the delivered service. Coverage and capacity are the most important characteristics of any cellular network. In WCDMA networks, the pilot signal of a cell is used to determine the cell size, hence it can be used to determine the coverage area of the cell. Increasing or reducing the cell pilot power increases or reduces the cell size respectively and hence pilot power can be used to balance load among neighboring cells. As networks continue to evolve, the frequency of optimization and number of tunable parameters continues to increase making manual optimization challenging. This paper presents a practical solution to the pilot power optimization problem in WCDMA networks and addresses the issue of rising optimization complexity by presenting a self-optimization based algorithm for tuning pilot power. When running in closed loop, the algorithm can be used to autonomously optimize pilot power and load balance traffic in the network. When scheduled or triggered manually, the algorithm can also be used to improve network capacity in areas expecting high traffic load during a certain time for example during social gatherings.","PeriodicalId":134009,"journal":{"name":"2015 International Conference on High Performance Computing & Simulation (HPCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130999645","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

GPGPU performance evaluation of some basic molecular dynamics algorithms GPGPU性能评价的一些基本分子动力学算法

2015 International Conference on High Performance Computing & Simulation (HPCS) Pub Date : 2015-07-20 DOI: 10.1109/HPCSim.2015.7237104

A. Minkin, A. Teslyuk, A. Knizhnik, B. Potapkin

引用次数: 5

Transient performance evaluation of cloud computing applications and dynamic resource control in large-scale distributed systems 大规模分布式系统中云计算应用的暂态性能评估与动态资源控制

2015 International Conference on High Performance Computing & Simulation (HPCS) Pub Date : 2015-07-20 DOI: 10.1109/HPCSim.2015.7237046

Edwin L. C. Mamani, L. A. P. Júnior, M. J. Santana, R. Santana, Pedro Northon Nobile, F. J. Monaco

引用次数: 6

Efficient storage scheme for n-dimensional sparse array: GCRS/GCCS n维稀疏阵列的高效存储方案:GCRS/GCCS

2015 International Conference on High Performance Computing & Simulation (HPCS) Pub Date : 2015-07-20 DOI: 10.1109/HPCSim.2015.7237032

Md Abu Hanif Shaikh, K. Hasan

{"title":"Efficient storage scheme for n-dimensional sparse array: GCRS/GCCS","authors":"Md Abu Hanif Shaikh, K. Hasan","doi":"10.1109/HPCSim.2015.7237032","DOIUrl":"https://doi.org/10.1109/HPCSim.2015.7237032","url":null,"abstract":"Degree of data sparsity increases with the increase of number of dimensions in high performance scientific computing. Storing and applying operations on this highly sparse multidimensional data is still a challenge for data scientists. Experts suggest special storage scheme over sparse array. In traditional sparse array storage scheme, (n+l) one dimensional arrays are necessary to store n-dimensional array. In this paper, we propose `Generalized Row/Column Storage (GCRS/GCCS)' scheme which requires three one dimensional arrays only for storing a n-dimensional array. The superiority of the GCRS/GCCS over traditional Compressed Row/Column Storage (CRS/CCS) is shown by both theoretical analysis and experimental results. In theoretical analysis, we derive equations for space and time complexity as well as the range of usability for GCRS/GCCS. It is shown that the GCRS/GCCS scheme yields to support minimum 50% data density where as the range of usability is inversely proportional with the number of dimensions for CRS/CCS scheme. The experimental result shows that the proposed GCRS/GCCS scheme outperforms the CRS/CCS scheme with respect to space complexity, time complexity and range of usability.","PeriodicalId":134009,"journal":{"name":"2015 International Conference on High Performance Computing & Simulation (HPCS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117179962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

A survey on Information Flow Control mechanisms in web applications web应用中的信息流控制机制综述

2015 International Conference on High Performance Computing & Simulation (HPCS) Pub Date : 2015-07-20 DOI: 10.1109/HPCSim.2015.7237042

Oscar Zibordi de Paiva, W. Ruggiero

引用次数: 2

Performance evaluation of Data Mining algorithms on three generations of Intel® microarchitecture 数据挖掘算法在三代Intel®微架构上的性能评估

2015 International Conference on High Performance Computing & Simulation (HPCS) Pub Date : 2015-07-20 DOI: 10.1109/HPCSim.2015.7237059

S. Sadasivam, S. Selvi

{"title":"Performance evaluation of Data Mining algorithms on three generations of Intel® microarchitecture","authors":"S. Sadasivam, S. Selvi","doi":"10.1109/HPCSim.2015.7237059","DOIUrl":"https://doi.org/10.1109/HPCSim.2015.7237059","url":null,"abstract":"Data Mining algorithms and machine learning techniques form a key part of the majority of computing applications today. They are becoming an inherent part of business decision processes, e-commerce, social networking and social media applications as well as commercial and scientific computing applications. It is becoming increasingly important to provide a high performance computing platform for these emerging data mining applications. In this paper we explore the performance characteristics of the data mining benchmark suite MineBench across three “tock” generations of Intel microarchitecture. Our objective is to study the impact of microarchitecture improvements on the performance of data mining algorithms. We present comparative microarchitecture characteristics between data mining algorithms and SPEC INT 2006 benchmarks. We have proposed a generic cycle accounting methodology to attribute performance improvements to various units of the microprocessor. The proposed methodology helps differentiate the impact on performance due to front-end and back-end microarchitecture improvements.","PeriodicalId":134009,"journal":{"name":"2015 International Conference on High Performance Computing & Simulation (HPCS)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127584179","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Utilization of room-to-room transition time in Wi-Fi fingerprint-based indoor localization 基于Wi-Fi指纹的室内定位中房间间过渡时间的利用

2015 International Conference on High Performance Computing & Simulation (HPCS) Pub Date : 2015-07-20 DOI: 10.1109/HPCSim.2015.7237056

Isil Karabey, Levent Bayindir

{"title":"Utilization of room-to-room transition time in Wi-Fi fingerprint-based indoor localization","authors":"Isil Karabey, Levent Bayindir","doi":"10.1109/HPCSim.2015.7237056","DOIUrl":"https://doi.org/10.1109/HPCSim.2015.7237056","url":null,"abstract":"In indoor localization applications, many different methods have been proposed to increase positioning accuracy. Among these methods, fingerprint-based techniques are generally preferred because they use existing resources such as Wi-Fi, Bluetooth, FM signals, etc., and can be implemented on commonly used devices such as mobile phones. In this paper, we evaluate different Wi-Fi fingerprint-based methods on two datasets (with and without room-to-room transition features) created from the same environment, and we investigate the impact of room-to-room transition features on classification performance. To the best of our knowledge, transition time between rooms has not been used in past studies on fingerprint-based indoor localization. This information is of significant importance, due to the physical distance between rooms. Therefore, in this study source room and transition time to a target room have been included as features in addition to signal sources and signal strength values in the target room. From preliminary experimental results we observed that the transition time between rooms increases the performance of all tested positioning algorithms, with the Back-propagation classifier showing the best performance increase (13%).","PeriodicalId":134009,"journal":{"name":"2015 International Conference on High Performance Computing & Simulation (HPCS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129819335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Applying domain decomposition Schwarz method to accelerate wind field calculation 应用域分解Schwarz方法加速风场计算

2015 International Conference on High Performance Computing & Simulation (HPCS) Pub Date : 2015-07-20 DOI: 10.1109/HPCSim.2015.7237080

Gemma Sanjuan, T. Margalef, A. Cortés

引用次数: 6

Fast and scalable NUMA-based thread parallel breadth-first search 快速和可扩展的基于numa的线程并行宽度优先搜索

2015 International Conference on High Performance Computing & Simulation (HPCS) Pub Date : 2015-07-20 DOI: 10.1109/HPCSim.2015.7237065

Yuichiro Yasui, K. Fujisawa

引用次数: 23

The Batched DOACROSS loop parallelization algorithm 批处理DOACROSS循环并行化算法

2015 International Conference on High Performance Computing & Simulation (HPCS) Pub Date : 2015-07-20 DOI: 10.1109/HPCSim.2015.7237079

D. C. S. Lucas, G. Araújo

{"title":"The Batched DOACROSS loop parallelization algorithm","authors":"D. C. S. Lucas, G. Araújo","doi":"10.1109/HPCSim.2015.7237079","DOIUrl":"https://doi.org/10.1109/HPCSim.2015.7237079","url":null,"abstract":"Parallelizing loops containing loop-carried dependencies has been considered a very difficult task, mainly due to the overhead imposed by communicating dependencies between iterations. Despite the huge effort to devise effective parallelization techniques for such loops, the problem is still far from solved. For many loops, old (DOACROSS), and new (DSWP) techniques have not been able to offer a solution to this problem. This paper does a qualitative and quantitative analysis of synchronization costs of these two loop parallelization algorithms, on two modern computer architectures (ARM A9 MPCore and Intel Ivy Bridge). Our results show that at least 30% of the execution time of the programs we parallelized are spent on synchronization/data communication. We also show that, besides the problem being hard, these architectures are on opposite endpoints along the axis of commonly accepted requisites for efficient loop parallelization. As a consequence, both techniques struggle to effectively speed up several programs. Moreover, this paper presents a novel algorithm, called Batched DOACROSS (BDX), that capitalizes on the advantages of DSWP and DOACROSS, while minimizing their deficiencies. BDX does not require new hardware mechanisms (as DSWP does) and makes use of thread local buffers to reduce DOACROSS synchronization overheads.","PeriodicalId":134009,"journal":{"name":"2015 International Conference on High Performance Computing & Simulation (HPCS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121762949","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8