S. Nassif, P. Zuchowski, Claude Moughanni, M. Moosa, S. Posluszny, W. Vercruysse
{"title":"The Titanic: what went wrong!","authors":"S. Nassif, P. Zuchowski, Claude Moughanni, M. Moosa, S. Posluszny, W. Vercruysse","doi":"10.1145/1065579.1065671","DOIUrl":"https://doi.org/10.1145/1065579.1065671","url":null,"abstract":"We often hear about success stories in EDA. We are all justifiably proud of the impact we collectively make on the overall integrated circuit design and manufacturing machine. It is fair to say, however, the one learns far more from failure than one does from success. In this special session we found several brave practitioners who are willing to talk about problems in business-as-usual EDA. These problems include technology related issues; reliability related issues, power issues and even methodology issues - In short, covering a wide swatch of the EDA domain.","PeriodicalId":128696,"journal":{"name":"Proceedings of the 42nd annual Design Automation Conference","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124155243","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Session details: Circuit performance under parameter variation","authors":"L. M. Silveira, C. C. Chen, J. Phillips","doi":"10.1145/3246232","DOIUrl":"https://doi.org/10.1145/3246232","url":null,"abstract":"","PeriodicalId":128696,"journal":{"name":"Proceedings of the 42nd annual Design Automation Conference","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122732001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Vleeschhouwer, Warren East, Michael J. Fister, A. Geus, W. Rhines, Jackson Hu, Rick Cassidy
{"title":"Differentiate and deliver: leveraging your partners","authors":"J. Vleeschhouwer, Warren East, Michael J. Fister, A. Geus, W. Rhines, Jackson Hu, Rick Cassidy","doi":"10.1145/1065579.1065583","DOIUrl":"https://doi.org/10.1145/1065579.1065583","url":null,"abstract":"For the past 25 years, the EDA industry has played a major role in the growth of the semiconductor industry, providing tools and services that have helped companies develop electronics products that permeate and improve every aspect of our daily lives.As the semiconductor industry moves into the nanometer era, they face many key questions when envisioning a new product. When do they want the product to reach the market? How will that product be differentiated? Where do they develop and manufacture that product?Less than a decade ago, these questions would have been answered completely independent of whatever EDA vendor a semiconductor company selected. However, in the nanometer era, the answers to these questions can be significantly influenced not only by EDA companies but also by the IP and pure-play foundries that make up the infrastructure of the semiconductor industry. In order to compete in a global marketplace, these companies must align their individual core competencies with those of the semiconductor industry to help IC companies create products with the optimal combination of performance, price, and time-to-market.In this panel, the CEOs of the three major EDA vendors, along with peers from the IP and manufacturing areas discuss these fundamental changes to the semiconductor industry, and the challenges of working together to help customers successfully bring new products to market.Jay Vleeschhouwer, a senior analyst for Merrill Lynch, will moderate a series of questions for the panelists from the customer's point of view that address how EDA, IP and pure-play foundries can impact the competitiveness of semiconductor companies and the products they develop.","PeriodicalId":128696,"journal":{"name":"Proceedings of the 42nd annual Design Automation Conference","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122874209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Session details: Is methodology the highway out of verification hell?","authors":"G. Moretti, F. Bacchini","doi":"10.1145/3246225","DOIUrl":"https://doi.org/10.1145/3246225","url":null,"abstract":"","PeriodicalId":128696,"journal":{"name":"Proceedings of the 42nd annual Design Automation Conference","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123621326","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ron Wilson, Joe Gianelli, C. Hamlin, K. McElvain, S. Leibson, Ivo Bolson, Rich Tobias, R. Camposano
{"title":"Structured/platform ASIC apprentices: which platform will survive your board room?","authors":"Ron Wilson, Joe Gianelli, C. Hamlin, K. McElvain, S. Leibson, Ivo Bolson, Rich Tobias, R. Camposano","doi":"10.1145/1065579.1065811","DOIUrl":"https://doi.org/10.1145/1065579.1065811","url":null,"abstract":"Moore's law delivers higher performance and lower cost for FPGAs and ASICs alike, but at the 90nm process node and below, design schedules using the traditional cell-based ASIC design methodology hit a wall of uncertainty. At 90nm and below an emerging alternative ASIC design platform is either Platform ASIC or FPGAs. Which way will the cell-based ASIC designer turn for their next design?Over time, FPGAs and structured/platform ASICs are together poised to replace today's cell-based ASIC market, but which is the real answer to future digital design? Can companies really use these platforms to achieve the system cost reduction and functionality that they need to stay competitive? Which applications will migrate to these platforms the fastest? Is it possible to just tweak the existing cell-based methodology to more efficiently reach the benefits of 90nm process nodes and below? This lively panel will discuss whether it is FPGAs, structured/platform ASICs, or something else that stand to gain the most ground from the projected $25B ASIC market, and why.","PeriodicalId":128696,"journal":{"name":"Proceedings of the 42nd annual Design Automation Conference","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131792655","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Session details: The Titanic: what went wrong","authors":"A. Kahng, S. Nassif","doi":"10.1145/3246215","DOIUrl":"https://doi.org/10.1145/3246215","url":null,"abstract":"","PeriodicalId":128696,"journal":{"name":"Proceedings of the 42nd annual Design Automation Conference","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132382346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Session details: CAD for FPGAs","authors":"S. Trimberger, P. Lysaght, S. Teig","doi":"10.1145/3246221","DOIUrl":"https://doi.org/10.1145/3246221","url":null,"abstract":"","PeriodicalId":128696,"journal":{"name":"Proceedings of the 42nd annual Design Automation Conference","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126212159","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Proceedings of the 42nd annual Design Automation Conference","authors":"","doi":"10.1145/1065579","DOIUrl":"https://doi.org/10.1145/1065579","url":null,"abstract":"","PeriodicalId":128696,"journal":{"name":"Proceedings of the 42nd annual Design Automation Conference","volume":"85 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133820076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}