2010 Workshop on Fault Diagnosis and Tolerance in Cryptography最新文献

Memory Address Scrambling Revealed Using Fault Attacks 通过故障攻击发现内存地址置乱

2010 Workshop on Fault Diagnosis and Tolerance in Cryptography Pub Date : 2010-08-21 DOI: 10.1109/FDTC.2010.13

J. Fournier, Philippe Loubet-Moundi

引用次数: 8

Low Cost Built in Self Test for Public Key Crypto Cores 公钥加密核心的低成本内置自测

2010 Workshop on Fault Diagnosis and Tolerance in Cryptography Pub Date : 2010-08-21 DOI: 10.1109/FDTC.2010.12

Dusko Karaklajic, Miroslav Knezevic, I. Verbauwhede

引用次数: 8

A Continuous Fault Countermeasure for AES Providing a Constant Error Detection Rate AES的连续故障对策，提供恒定的错误检测率

2010 Workshop on Fault Diagnosis and Tolerance in Cryptography Pub Date : 2010-08-21 DOI: 10.1109/FDTC.2010.16

M. Medwed, Jörn-Marc Schmidt

引用次数: 12

Fault Attacks and Countermeasures on Vigilant's RSA-CRT Algorithm 警惕性RSA-CRT算法的故障攻击及对策

2010 Workshop on Fault Diagnosis and Tolerance in Cryptography Pub Date : 2010-08-21 DOI: 10.1109/FDTC.2010.9

J. Coron, Christophe Giraud, N. Morin, G. Piret, David Vigilant

引用次数: 26

Differential Fault Analysis against AES-192 and AES-256 with Minimal Faults 基于最小故障的AES-192和AES-256差分故障分析

2010 Workshop on Fault Diagnosis and Tolerance in Cryptography Pub Date : 2010-08-21 DOI: 10.1109/FDTC.2010.10

Chong Hee Kim

引用次数: 60

Generic Analysis of Small Cryptographic Leaks 小型密码泄露的一般分析

2010 Workshop on Fault Diagnosis and Tolerance in Cryptography Pub Date : 2010-08-21 DOI: 10.1109/FDTC.2010.11

Itai Dinur, A. Shamir

{"title":"Generic Analysis of Small Cryptographic Leaks","authors":"Itai Dinur, A. Shamir","doi":"10.1109/FDTC.2010.11","DOIUrl":"https://doi.org/10.1109/FDTC.2010.11","url":null,"abstract":"Side channel attacks are typically divided into two phases: In the{it collection phase} the attacker tries to measure some physical property of the implementation, and in the {it analysis phase} he tries to derive the cryptographic key from the measured information. The field is highly fragmented, since there are many types of leakage, and each one of them usually requires a different type of analysis. In this paper we formalize a general notion of {it leakage attacks} on iterated cryptosystems, in which the attacker can collect (via physical probing, power measurement, or any other type of side channel) one bit of information about the intermediate state of the encryption after each round. Since bits computed during the early rounds can be usually represented by low degree multivariate polynomials in the plaintext and key bits, we can use the recently discovered cube attack as a generic analysis phase which can be applied in principle to any type of leaked data. However, the original cube attack requires extremely clean data, whereas the information provided by side channel attacks can be quite noisy. To address this problem, we develop in this paper a new type of {it robust cube attack}, which can recover the key even when some of the leaked bits are unreliable. In particular, we show how to exploit{it trivial equations} (of the form $0=0$, which are plentiful but useless in standard cube attacks) in order to correct a fraction of measurement errors which can be arbitrarily close to1. Finally, we demonstrate our approach by describing efficient leakage attacks on Serpent (requiring only $2^{18}$ time for full key recovery when the leaked state bits are clean) and on AES (requiring $2^{35}$ time in the same scenario), and show how to make them robust with a small additional complexity.","PeriodicalId":127275,"journal":{"name":"2010 Workshop on Fault Diagnosis and Tolerance in Cryptography","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123026108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Multi Fault Laser Attacks on Protected CRT-RSA 对受保护CRT-RSA的多故障激光攻击

2010 Workshop on Fault Diagnosis and Tolerance in Cryptography Pub Date : 2010-08-21 DOI: 10.1109/FDTC.2010.14

E. Trichina, Roman Korkikyan

引用次数: 105

Optical Fault Masking Attacks 光故障屏蔽攻击

2010 Workshop on Fault Diagnosis and Tolerance in Cryptography Pub Date : 2010-08-21 DOI: 10.1109/FDTC.2010.18

S. Skorobogatov

引用次数: 66

Fault Injection Resilience 故障注入弹性

2010 Workshop on Fault Diagnosis and Tolerance in Cryptography Pub Date : 2010-08-21 DOI: 10.1109/FDTC.2010.15

S. Guilley, L. Sauvage, J. Danger, Nidhal Selmane

{"title":"Fault Injection Resilience","authors":"S. Guilley, L. Sauvage, J. Danger, Nidhal Selmane","doi":"10.1109/FDTC.2010.15","DOIUrl":"https://doi.org/10.1109/FDTC.2010.15","url":null,"abstract":"Fault injections constitute a major threat to the security of embedded systems. Errors occurring in the cryptographic algorithms have been shown to be extremely dangerous, since powerful attacks can exploit few of them to recover the full secrets. Most of the resistance techniques to perturbation attacks have relied so far on the detection of faults. We present in this paper another strategy, based on the resilience against fault attacks. The core idea is to allow an erroneous result to be outputted, but with the assurance that this faulty information conveys no information about the secrets concealed in the chip. We first underline the benefits of FIR: false positive are never raised, secrets are not erased uselessly in case of uncompromising faults injections, which increases the card lifespan if the fault is natural and not malevolent, and FIR enables a high potential of resistance even in the context of multiple faults. Then we illustrate two families of fault injection resilience (FIR) schemes suitable for symmetric encryption. The first family is a protocol-level scheme that can be formally proved resilient. The second family mobilizes a special logic-level architecture of the cryptographic module. We notably detail how a countermeasure of this later family, namely dual-rail with precharge logic style, can both protect both against active and passive attacks, thereby bringing a combined global protection of the device. The cost of this logic is evaluated as lower than detection schemes. Finally, we also give some ideas about the modalities of adjunction of FIR to some certification schemes.","PeriodicalId":127275,"journal":{"name":"2010 Workshop on Fault Diagnosis and Tolerance in Cryptography","volume":"13 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132154752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 38

Passive and Active Combined Attacks on AES Combining Fault Attacks and Side Channel Analysis 结合故障攻击和侧信道分析的AES被动和主动组合攻击

2010 Workshop on Fault Diagnosis and Tolerance in Cryptography Pub Date : 2007-09-10 DOI: 10.1109/FDTC.2010.17

Christophe Clavier, B. Feix, Georges Gagnerot, Mylène Roussellet

引用次数: 110