{"title":"System implications of information privacy","authors":"H. E. Petersen, R. Turn","doi":"10.1145/1465482.1465526","DOIUrl":"https://doi.org/10.1145/1465482.1465526","url":null,"abstract":"Recent advances in computer time-sharing technology promise information systems which will permit simultaneous on-line access to many users at remotely located terminals. In such systems, the question naturally arises of protecting one user's stored programs and data against unauthorized access by others. Considerable work has already been done in providing protection against accidental access due to hardware malfunctions or undebugged programs. Protection against deliberate attempts to gain access to private information, although recently discussed from a philosophical point of view, has attracted only fragmentary technical attention. This paper presents a discussion of the threat to information privacy in non-military information systems, applicable countermeasures, and system implications of providing privacy protection.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125356721","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A cryoelectronic distributed logic memory","authors":"B. A. Crane, R. Laane","doi":"10.1145/1465482.1465567","DOIUrl":"https://doi.org/10.1145/1465482.1465567","url":null,"abstract":"The thin-film cryotron's ability to combine memory and logic functions in large, highly integrated circuit arrays has led to investigations of its use in implementing associative or content addressable memories. This paper describes the design and operation of a cryoelectronic associative memory, a version of Distributed Logic Memory consisting of 72, 8-bit associatively accessed cells and operating at around 0.4 million instructions per second. The memory array contains approximately 3400 cryotrons on four substrates. The substrates were fabricated by the General Electric Computer Laboratory, Sunnyvale, California, using their recently described hybrid technology; and circuit design, array assembly, testing and operation was done by Bell Telephone Laboratories.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"223 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126119542","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new printing principle","authors":"W. Puterbaugh, S. P. Emmons","doi":"10.1145/1465482.1465500","DOIUrl":"https://doi.org/10.1145/1465482.1465500","url":null,"abstract":"Previous printing applications have been largely confined to the processor printout, where high speed and multiple copies were necessary. These printers were largely mechanical impact devices operating near the edge of the performance expected of high-speed mechanisms. The few non-impact printers developed for these applications have not found general use because of unsuitable cost/performance ratios.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121588183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Code generation for PIE (Parallel Instruction Execution) computers","authors":"J. Thorlin","doi":"10.1145/1465482.1465585","DOIUrl":"https://doi.org/10.1145/1465482.1465585","url":null,"abstract":"Computers capable of executing more than one instruction at a time, e.g. buffered I/O instructions executing in parallel with computation, have been available for many years. Only recently have machines been generally available which possess the PIE characteristic to any higher degree, most notable of these is the CONTROL DATA® 6600 Computer. Due to the lack of such machines in the past, little work has been done to develop code generation strategies which are capable of making effective use of this facility. The techniques used by a hand coder to generate good code for a PIE computer differ significantly from those used on serial instruction computers; they are much more time consuming and require more knowledge of the hardware, but the results will more fully utilize the available circuitry and will, consequently, produce significant improvements in computing speeds. The reordering of old code produced with earlier code generation methods has reduced execution time by 50 per cent.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127645483","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Statistical validation of mathematical computer routines","authors":"C. Hammer","doi":"10.1145/1465482.1465535","DOIUrl":"https://doi.org/10.1145/1465482.1465535","url":null,"abstract":"Increasing attention is being given to a host of problems associated with the use of the so-called mathematical subroutines in computational processes executed on digital computers. An assessment of the routines available today with most machines indicates a definite need for better validation procedures and for more carefully chosen terms in pertinent documentation. As a matter of fact, what is really required is simply greater adherence to \"legal\" documentation: to tell the truth, the whole truth, and nothing but the trust.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126740989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of diagnosable sequential machines","authors":"Z. Kohavi, P. Lavallée","doi":"10.1145/1465482.1465597","DOIUrl":"https://doi.org/10.1145/1465482.1465597","url":null,"abstract":"A diagnosable sequential machine is one which possesses a distinguishing (or diagnosing) sequence(s) and thus permits us to uniquely identify the various states of the machine by inspecting its response to the distinguishing sequence.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125563756","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Farrand, R. Horsfall, N. E. Marcum, W. D. Williams
{"title":"A rugged militarily fieldable mass store (MEM-BRAIN file)","authors":"W. Farrand, R. Horsfall, N. E. Marcum, W. D. Williams","doi":"10.1145/1465482.1465516","DOIUrl":"https://doi.org/10.1145/1465482.1465516","url":null,"abstract":"Military systems often operate on a data base larger than is economically feasible for internal main store. Therefore, they require the use of auxiliary storage. There are many forms of auxiliary store. Each has characteristics which make it the optimum choice for certain tasks. Factors characterizing the domains of utility of some auxiliary storage systems are:\u0000 Fixed Head Drums: Under 4 million bits\u0000 Magnetic Real Tape Systems: Over 1/2 sec. average random access/block\u0000 Woven Wire Systems: Under 10 million bits\u0000 Tape Loop Systems: Under 50 million bits\u0000 Roving Head Drums: Under 50 million bits\u0000 Tape Strip Files: Over 1/2 sec. average random access (unit documents)\u0000 Disk Pack Systems: 20--50 million bits/pack (interchangeable data base)\u0000 Fixed Head Disk Files: Under 500 million bits\u0000 Roving Head Disk Files: Under 100 ms average access and over 50 million bits","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127474272","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Compiler generation using formal specification of procedure-oriented and machine languages","authors":"P. Gilbert, W. G. McLellan","doi":"10.1145/1465482.1465553","DOIUrl":"https://doi.org/10.1145/1465482.1465553","url":null,"abstract":"This paper reports on a recently developed compiler generation system which is rigorously based, and which allows formal specification both of source (procedure-oriented) languages (POLs) and of machine languages (MLs). Concepts underlying the system are discussed, an example correlating source language specification with system operation is given, and the status and potentialities of the system are discussed.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127791122","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Simulation of an ECS-based operating system","authors":"M. H. MacDougall","doi":"10.1145/1465482.1465601","DOIUrl":"https://doi.org/10.1145/1465482.1465601","url":null,"abstract":"Extended Core Storage (ECS) for the Control Data 64/6600 System has been described in another paper. ECS is a large capacity, word-addressable core memory with block transfer times of from eight to ten words per microsecond after a transfer start-up time of approximately 2 microseconds. ECS memories range in size from 131K to over two million words, and can be shared by up to four 6000 systems. The cost per word of Extended Core Storage is about one-tenth that of Central Memory (CM).","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126114588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. W. Barron, A. Fraser, D. Hartley, B. Landy, R. Needham
{"title":"File handling at Cambridge University","authors":"D. W. Barron, A. Fraser, D. Hartley, B. Landy, R. Needham","doi":"10.1145/1465482.1465508","DOIUrl":"https://doi.org/10.1145/1465482.1465508","url":null,"abstract":"The file handling facility now in use on the Titan computer at the University Mathematical Laboratory, Cambridge provides storage for data over indefinitely long periods of time and yet contrives to make that data available on demand. An 8 million word disc is augmented by the use of magnetic tape. The organization of this available space is entirely a system responsibility and the user can normally expect data to be transferred into his immediate access store area on demand.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117170155","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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