{"title":"THOR: a display based time sharing system","authors":"J. McCarthy, D. Brian, Gary Feldman, John Allen","doi":"10.1145/1465482.1465582","DOIUrl":"https://doi.org/10.1145/1465482.1465582","url":null,"abstract":"THOR is a time sharing system for the PDP-1 computer with the capacity to run twenty user programs. The system has twenty-eight user consoles, twelve of which are combination keyboard and cathode ray tube display consoles. THOR is designed to capitalize on the display's ability to present large quantities of information quickly and to mitigate the fact that hard copy is not available at display consoles. The other sixteen consoles are Model 33 teletypes with the attendant slow presentation of information and the availability of hard copy. Because there are more consoles than user programs available, a user program may use more than one console.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1967-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123870055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Experience using a time-shared multi-programming system with dynamic address relocation hardware","authors":"R. O'Neill","doi":"10.1145/1465482.1465581","DOIUrl":"https://doi.org/10.1145/1465482.1465581","url":null,"abstract":"The IBM Research M44 computer is an experimental machine which was installed in the Thomas J. Watson, Sr. Research Center, in Yorktown Heights, New York, in November of 1964. The machine is an extensively modified IBM 7044, a binary single-address fixed-word-length computer with a CPU cycle time of 2 micro-seconds.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1967-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116813798","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Engineering design of macromodules","authors":"A. Blum, T. J. Chaney, R. Olson","doi":"10.1145/1465482.1465539","DOIUrl":"https://doi.org/10.1145/1465482.1465539","url":null,"abstract":"Macromodules are intended for assembly into a wide variety of computer structures with as few restrains on the designers' choice of the geometry of the machine as it is practical to require. The goal of geometric flexibility makes the problem of reliably interconnecting the modules to communicate date more difficult than usual. The ad-hoc repair of transmission failures is precluded because such problems would simple relocate as the system structure is altered by its users, and the detection and repair of the faults would be necessary after each alteration. Thus, as a practical consideration, hardware designs which do not eliminate such failures limit the system flexibility. Consequently, a substantial proportion of the engineering effort has focused on the data communication problem. Because the power distribution system interconnects the modules, it represents a set of pathways over which undesired signals may propagate.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1967-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115480036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SPRINT: a direct approach to list processing languages","authors":"C. Kapps","doi":"10.1145/1465482.1465591","DOIUrl":"https://doi.org/10.1145/1465482.1465591","url":null,"abstract":"Most current list processing languages such as LISP and IPL-V operate in an indirect manner, i.e., during execution of a program written in these languages, the basic operations do not deal directly with data but rather with addresses which point to the data, making it awkward to perform operations at the input syntax level.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"136 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1967-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114094728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Humanizing industrial control software","authors":"J. Neblett, D. Brevik","doi":"10.1145/1465482.1465610","DOIUrl":"https://doi.org/10.1145/1465482.1465610","url":null,"abstract":"Process control by computer is common enough today to justify postulating an industrywide basic software system to aid in the implementation of control systems. There have been many successful industrial control systems; however, the main emphasis of this paper is directed toward the problems that prevented some other systems from attaining really successful operation. The reasons presented are mainly concerned with the software of programming aspects and not with the suitability of hardware or the basic financial justification for the computerized system.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1967-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128370806","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An experimental general purpose compiler","authors":"Richard S. Bandat, R. Wilkins","doi":"10.1145/1465482.1465554","DOIUrl":"https://doi.org/10.1145/1465482.1465554","url":null,"abstract":"With the advent of numerous programming languages, both special and general purpose, much interest has been generated in developing newer and higher level programming languages. Two notable approaches have been taken in the attempt to provide language processors for the development of new programming languages with a minimum investment in programmer time and effort. One method is to provide, in an existing programming language, facilities for list processing, stack maintenance, and character manipulation, which can then be used to write a compiler for the language under development. Another approach is the now classic \"Meta-Compiler\" method typified by the \"Meta\" series of programs by Val Schorre et al. In these programs, a description of the syntax of the source language is given, together with a paraform code which contains transformational rules. The output is the desired compiler.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1967-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116493923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Ershov, G. I. Kozhukhin, G. P. Makarov, M. I. Necherpurnko, I. V. Pottosin
{"title":"An experimental automatic informational station AIST-O","authors":"A. Ershov, G. I. Kozhukhin, G. P. Makarov, M. I. Necherpurnko, I. V. Pottosin","doi":"10.1145/1465482.1465577","DOIUrl":"https://doi.org/10.1145/1465482.1465577","url":null,"abstract":"AIST-O is an experimental middle-scale time-sharing system. The name Automatic Informational Station (AIST) has been chosen to stress, by analogy, some new possibilities presented by time-sharing systems which give to a computation service some features of public informational and computational utility.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1967-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130254688","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Plated wire bit steering for logic and storage","authors":"W. Chow, L. Spandorfer","doi":"10.1145/1465482.1465566","DOIUrl":"https://doi.org/10.1145/1465482.1465566","url":null,"abstract":"This paper describes a new form of magnetic logic technology known as bit steering which utilizes plated wire for both storage and logic and permits logic manipulations directly within the memory matrix. Bit steering exploits the inherent plated wire NDRO property, the excellent coupling between the wire and its magnetic surface, the relatively thick magnetic film, the low impedance possibilities of the wire loop, the stripline transverse strap loop, and the continuous fabrication process which provides uniform properties along the wire.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1967-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132686636","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Logical design of macromodules","authors":"M. Stucki, S. Ornstein, W. Clark","doi":"10.1145/1465482.1465538","DOIUrl":"https://doi.org/10.1145/1465482.1465538","url":null,"abstract":"The macromodules being developed at Washington University are logical building blocks which can be inserted into a special frame and inter-connected by standardized cables to form digital computing systems of any desired complexity. The logical design of these modules is fraught with many problems, some of which yield easily to standard design techniques and others which do not. The purpose of this paper is to present the design approaches in present use for the handling of problems of the latter type. Specifically, rather than present the details of adders, shifters, registers, etc., discussion is confined to those aspects of the logic within the modules which simplifies the job of assembling the modules into a working system. The general areas of asynchronous control, data validation, and word-length extension are discussed and design approaches presented. These approaches are then illustrated in the design of the macromodular data transfer operation, and the paper concludes with a few general comments on the circuitry now in use.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"238 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1967-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114435430","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Computer applications in biomedical electronics pattern recognition studies","authors":"A. Welch, J. L. Devine, R. Loudon","doi":"10.1145/1465482.1465520","DOIUrl":"https://doi.org/10.1145/1465482.1465520","url":null,"abstract":"The University of Texas is fortunate in having excellent computational facilities available for utilization in research. This paper is an applications survey dealing with how these facilities are used by the biomedical electronics group in the Electrical Engineering Department of the University.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1967-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129134041","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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