{"title":"Improving SMT performance scheduling processes","authors":"R. Gonçalves, P. Navaux","doi":"10.1109/EMPDP.2002.994302","DOIUrl":"https://doi.org/10.1109/EMPDP.2002.994302","url":null,"abstract":"Nowadays, SMT (simultaneous multithreaded) architectures use aggressive techniques to execute instructions from different threads on shared resources simultaneously. SEMPRE (Superscalar architEcture with Multiple PRocesses in Execution) is a type of SMT architecture which was proposed to schedule and execute processes simultaneously. The waste of time on both process scheduling and context switching is minimal, providing high performance during the execution of applications. The SEMPRE architecture was analyzed and evaluated using execution-driven simulations of the SPEC benchmark suite. The simulations showed that process scheduling by hardware can provide reasonable performance over process scheduling by the operating system on equivalent SMT architectures, with little extra hardware. This higher performance is achieved because the hardware makes better use of the process time-slice. The performance of SEMPRE is always higher than the performance of traditional SMT, achieving more than 21% in some cases.","PeriodicalId":126071,"journal":{"name":"Proceedings 10th Euromicro Workshop on Parallel, Distributed and Network-based Processing","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130742449","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Assignment schemes for replicated services in Jini","authors":"V. Georgiev, V. Getov","doi":"10.1109/EMPDP.2002.994249","DOIUrl":"https://doi.org/10.1109/EMPDP.2002.994249","url":null,"abstract":"This paper introduces and compares different schemes for assignment of replicated services in Jini - an object-oriented middleware architecture for network-centric computing. Each client in Jini has to be assigned a service selected from the pool of available services, which have joined the Jini federation and registered with the lookup service. Both early and delayed assignments are considered as basic options in our evaluation. The information for the system load can be collected at four different levels of detail in order to be used in the process of assignment decisions. In our analysis, we concentrate on the scenario where the requests for service generated by the clients follow independent user-initiated or machine-initiated transactions. The performance evaluation of the assignment schemes follows the queuing systems methodology. The comparisons are done with regard to the mean residence time of the clients in the system as well as the control overhead imposed by the assignment schemes. A case study of the scheme using the lowest information level proves the effectiveness, applicability and limitations of the delayed assignment in comparison to the early one. These results are a first step towards developing a methodology for building large-scale applications for Jini-based distributed systems.","PeriodicalId":126071,"journal":{"name":"Proceedings 10th Euromicro Workshop on Parallel, Distributed and Network-based Processing","volume":"132 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115423740","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Integration of legacy client-server applications in a secure multi-tier architecture","authors":"Domenico Cotroneo, A. Mazzeo, L. Romano, S. Russo","doi":"10.1109/EMPDP.2002.994289","DOIUrl":"https://doi.org/10.1109/EMPDP.2002.994289","url":null,"abstract":"Presents a CORBA-based multi-tier architecture which is capable of adding security to an existing service. We assume the legacy application is available as a compiled program consisting of a client and a server module. Under these assumptions, we show how to build a new system which re-integrates the original service and secures it. The architecture we propose is quite flexible and represents a framework which can be adopted - with minor changes - for improving the security level of a wide class of legacy systems. A system prototype has been developed and its performance evaluated. The prototype uses digital certificates which can be provided by virtually any certification authority. A fundamental advantage of the proposed approach is that the legacy server is integrated in the secure system with no changes being made to it. This minimizes the development effort, since full reuse of existing software is achieved. Furthermore, backward compatibility is preserved, since it is possible to integrate the new clients with the pre-existing applications, protecting the investment in legacy systems.","PeriodicalId":126071,"journal":{"name":"Proceedings 10th Euromicro Workshop on Parallel, Distributed and Network-based Processing","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121939549","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Characterizing parallel workloads to reduce multiple writer overhead in shared virtual memory systems","authors":"S. Petit, J. Sahuquillo, A. Pont","doi":"10.1109/EMPDP.2002.994285","DOIUrl":"https://doi.org/10.1109/EMPDP.2002.994285","url":null,"abstract":"Shared virtual memory (SVM) systems, because of their software implementation, enable shared-memory programming at a low design and maintenance cost. Nevertheless, as hardware implementations become faster, their performance is still far from that achieved by distributed shared memory (DSM) systems. Nowadays, SVM systems use relaxed memory consistency models and multiple writer protocols as techniques to reduce latencies and false sharing, respectively. However, these techniques induce additional overhead that decreases system performance. We performed a study of workload behavior aimed at improving the design of SVM protocols. The work focused on the identification of the type of shared data patterns that can appear in the accesses to protected sections using semaphores. Most coherence actions in SVM systems are performed as a consequence of the write operations executed in critical sections, so we pay special attention to the write operations performed when multiple writers are allowed. As these write operations may present spatial locality, we also study the write patterns on shared pages with similar behaviour. Different software filters are applied in the instrumented parallel workloads selected to capture and classify the most common sharing patterns. This enables the recognition of those patterns in which coherence overhead can be reduced by modifying the coherence actions performed by the protocol. Despite the fact that the performance evaluation of new coherence solutions is not our main goal, the ideas presented to improve the behaviour of SVM systems can be implemented at a reasonable hardware/software cost.","PeriodicalId":126071,"journal":{"name":"Proceedings 10th Euromicro Workshop on Parallel, Distributed and Network-based Processing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128753829","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
B. Klauer, Frank Eschmann, R. Moore, K. Waldschmidt
{"title":"The CDAG: a data structure for automatic parallelization for a multithreaded architecture","authors":"B. Klauer, Frank Eschmann, R. Moore, K. Waldschmidt","doi":"10.1109/EMPDP.2002.994274","DOIUrl":"https://doi.org/10.1109/EMPDP.2002.994274","url":null,"abstract":"Despite the explosive new interest in distributed computing, bringing software-particularly legacy software-to parallel platforms remains a daunting task. The self distributing associative architecture (SDAARC) takes a two-fold approach to this problem. Seemingly sequential programs are first translated into a population of migratory threads and containers by the compiler, and then allowed to migrate to minimize communication while maximizing parallelism by a run time environment. However previous compilers for multithreaded architectures such as SDAARC did not permit the full range of control flow complexity found in programming languages such as C. Thus, we propose a new data structure, and present algorithms for its construction, which extends the familiar concepts of control flow and data flow graphs to conveniently represent the activities required of an automatically generated thread.","PeriodicalId":126071,"journal":{"name":"Proceedings 10th Euromicro Workshop on Parallel, Distributed and Network-based Processing","volume":"148 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126806412","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Eventually consistent failure detectors","authors":"M. Larrea, Antonio Fernández, S. Arévalo","doi":"10.1109/EMPDP.2002.994239","DOIUrl":"https://doi.org/10.1109/EMPDP.2002.994239","url":null,"abstract":"The concept of unreliable failure detector was introduced by T.D. Chandra and S. Toueg (1996) as a mechanism that provides information about process failures. This mechanism has been used to solve different problems in asynchronous systems, in particular the Consensus problem. In this paper, we present a new class of unreliable failure detectors, which we call Eventually Consistent and denote by /spl square/C. This class adds to the failure detection capabilities of other classes an eventual leader election capability. This capability allows all correct processes to eventually choose the same correct process as leader. We study the relationship between /spl square/C and other classes of failure detectors. We also propose an efficient algorithm to trans form /spl square/C into /spl square/P in models of partial synchrony. Finally, to show the power of this new class of failure detectors, we present a Consensus algorithm based on /spl square/C. This algorithm successfully exploits the leader election capability of the failure detector and performs better in number of rounds than all the previously proposed algorithms for failure detectors with eventual accuracy.","PeriodicalId":126071,"journal":{"name":"Proceedings 10th Euromicro Workshop on Parallel, Distributed and Network-based Processing","volume":"281 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117119116","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Proceedings 10th Euromicro Workshop on Parallel, Distributed and Network-based Processing","authors":"N. Podhorszki, C. Rodríguez","doi":"10.1109/EMPDP.2002.994204","DOIUrl":"https://doi.org/10.1109/EMPDP.2002.994204","url":null,"abstract":"The following topics are dealt with: parallel, distributed and network-based processing; performance analysis; Web computing; failure handling; Java and Jini; parallel and distributed programming tools for grids; unorthodox computing architectures; systems and applications; message passing; scheduling; algorithms; and mobile ad hoc networks.","PeriodicalId":126071,"journal":{"name":"Proceedings 10th Euromicro Workshop on Parallel, Distributed and Network-based Processing","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114083426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"DEWIZ-event-based debugging on the grid","authors":"D. Kranzlmuller","doi":"10.1109/EMPDP.2002.994258","DOIUrl":"https://doi.org/10.1109/EMPDP.2002.994258","url":null,"abstract":"Debugging tries to locate the reason for incorrect program behavior by analyzing the states occurring during a program's execution. Since the amount of state data affects the debugging process, dedicated analysis functionality must be provided for grid applications, which may process enormous amounts of application data over long execution times. This problem is addressed by the DeWiz tool with an extensible set of event-based analysis modules. The processing operates on an event graph model of the target program's behavior. The desired debugging tasks are specified by arranging and connecting the different DeWiz modules. Due to its selectable abstraction level and its universal applicability, it is suited for parallel and distributed programs. By exploiting the grid for time-consuming analysis tasks in distinct modules, even large amounts of state data can be processed and investigated. This allows to apply debugging activities to large scale grid applications, which are the most challenging targets.","PeriodicalId":126071,"journal":{"name":"Proceedings 10th Euromicro Workshop on Parallel, Distributed and Network-based Processing","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114790345","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}