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1996 Proceedings ICPP Workshop on Challenges for Parallel Processing最新文献

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Interconnection networks: dimensions in design 互连网络:设计中的尺寸
1996 Proceedings ICPP Workshop on Challenges for Parallel Processing Pub Date : 1996-08-12 DOI: 10.1109/ICPPW.1996.538589
S. Abraham
{"title":"Interconnection networks: dimensions in design","authors":"S. Abraham","doi":"10.1109/ICPPW.1996.538589","DOIUrl":"https://doi.org/10.1109/ICPPW.1996.538589","url":null,"abstract":"The interconnection network is the switching fabric responsible for providing communication between all processors in a parallel computer. Much research has been directed towards developing superior interconnection networks, but there is no general agreement that this problem is solved. The speakers for this panel session were asked to address the following question: for a given range of number of commodity high-performance processors (e.g. 256 to 1024) what interconnection network should be used to build a general purpose MIMD parallel machine.","PeriodicalId":123047,"journal":{"name":"1996 Proceedings ICPP Workshop on Challenges for Parallel Processing","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114874132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Let us build system-friendly networks-build them hierarchically 让我们构建系统友好型网络——分层构建
1996 Proceedings ICPP Workshop on Challenges for Parallel Processing Pub Date : 1996-08-12 DOI: 10.1109/ICPPW.1996.538591
William Tsun-Yuk Hsu, P. Yew
{"title":"Let us build system-friendly networks-build them hierarchically","authors":"William Tsun-Yuk Hsu, P. Yew","doi":"10.1109/ICPPW.1996.538591","DOIUrl":"https://doi.org/10.1109/ICPPW.1996.538591","url":null,"abstract":"Hierarchical systems address many hardware and software problems encountered by designers of large communication and computing systems; hence, interest in this field continues to grow. A diversity of hierarchical networks have been proposed in the literature. This paper introduces a framework for classifying hierarchical topologies. Using the framework, we survey existing topologies in an organized fashion and identify the major design choices. We show how new hierarchical networks can be generated by varying architectural parameters in the framework. The performance evaluation of the numerous topologies remains a non-trivial task; we describe some preliminary efforts in that direction.","PeriodicalId":123047,"journal":{"name":"1996 Proceedings ICPP Workshop on Challenges for Parallel Processing","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123253647","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Issues related to the structure and performance of parallel applications in a production environment 与生产环境中并行应用程序的结构和性能相关的问题
1996 Proceedings ICPP Workshop on Challenges for Parallel Processing Pub Date : 1996-08-12 DOI: 10.1109/ICPPW.1996.538588
David Schneider
{"title":"Issues related to the structure and performance of parallel applications in a production environment","authors":"David Schneider","doi":"10.1109/ICPPW.1996.538588","DOIUrl":"https://doi.org/10.1109/ICPPW.1996.538588","url":null,"abstract":"The Perfect Benchmark suite was an attempt to assemble a realistic collection of application codes which could be used by computer scientists for performance evaluation, exploration of new architectural features, and testing compiler technologies. This paper surveys the origin, use, and inherent biases in the suite.","PeriodicalId":123047,"journal":{"name":"1996 Proceedings ICPP Workshop on Challenges for Parallel Processing","volume":"34 22","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114109151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Restructuring programs for high-speed computers with Polaris 用北极星重组高速计算机程序
1996 Proceedings ICPP Workshop on Challenges for Parallel Processing Pub Date : 1996-08-12 DOI: 10.1109/ICPPW.1996.538601
W. Blume, R. Eigenmann, Keith Faigin, John Grout, Jaejin Lee, T. Lawrence, J. Hoeflinger, D. Padua, Y. Paek, Paul Petersen, W. Pottenger, Lawrence Rauchwerger, P. Tu, Stephen Weatherford
{"title":"Restructuring programs for high-speed computers with Polaris","authors":"W. Blume, R. Eigenmann, Keith Faigin, John Grout, Jaejin Lee, T. Lawrence, J. Hoeflinger, D. Padua, Y. Paek, Paul Petersen, W. Pottenger, Lawrence Rauchwerger, P. Tu, Stephen Weatherford","doi":"10.1109/ICPPW.1996.538601","DOIUrl":"https://doi.org/10.1109/ICPPW.1996.538601","url":null,"abstract":"The ability to automatically parallelize standard programming languages results in program portability across a wide range of machine architectures. It is the goal of the Polaris project to develop a new parallelizing compiler that overcomes limitations of current compilers. While current parallelizing compilers may succeed on small kernels, they often fail to extract any meaningful parallelism from whole applications. After a study of application codes, it was concluded that by adding a few new techniques to current compilers, automatic parallelization becomes feasible for a range of whole applications. The techniques needed are interprocedural analysis, scalar and array privatization, symbolic dependence analysis, and advanced induction and reduction recognition and elimination, along with run-time techniques to permit the parallelization of loops with unknown dependence relations.","PeriodicalId":123047,"journal":{"name":"1996 Proceedings ICPP Workshop on Challenges for Parallel Processing","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125711958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 31
Portable parallel programming in HPC++ hpc++中的便携式并行编程
1996 Proceedings ICPP Workshop on Challenges for Parallel Processing Pub Date : 1996-08-12 DOI: 10.1109/ICPPW.1996.538599
P. Beckman, Dennis Gannon, Elizabeth Johnson
{"title":"Portable parallel programming in HPC++","authors":"P. Beckman, Dennis Gannon, Elizabeth Johnson","doi":"10.1109/ICPPW.1996.538599","DOIUrl":"https://doi.org/10.1109/ICPPW.1996.538599","url":null,"abstract":"HPC++ is a C++ library and language extension framework that is being developed by the HPC++ consortium as a standard model for portable parallel C++ programming. This paper provides a brief introduction to HPC++ style programming and outlines some of the unresolved issues.","PeriodicalId":123047,"journal":{"name":"1996 Proceedings ICPP Workshop on Challenges for Parallel Processing","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116524714","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 23
Parallel I/O: a set of intertwined systems and applications issues 并行I/O:一组交织在一起的系统和应用程序问题
1996 Proceedings ICPP Workshop on Challenges for Parallel Processing Pub Date : 1996-08-12 DOI: 10.1109/ICPPW.1996.538593
P. Messina
{"title":"Parallel I/O: a set of intertwined systems and applications issues","authors":"P. Messina","doi":"10.1109/ICPPW.1996.538593","DOIUrl":"https://doi.org/10.1109/ICPPW.1996.538593","url":null,"abstract":"Historically, input/output (I/O) has been a bottleneck for many scientific and engineering applications. Sequential and vector supercomputers invested substantial resources into reducing that bottleneck. Now that high-performance computing is nearly synonymous with parallel computing, I/O has become more of a bottleneck and it is more difficult to eliminate it because of the complexity of data movements between hundreds or thousands of processors and dozens or hundreds of I/O devices. This problem is starting to be addressed by various research and development efforts and by computer vendors. Some early efforts and lessons learned are presented.","PeriodicalId":123047,"journal":{"name":"1996 Proceedings ICPP Workshop on Challenges for Parallel Processing","volume":"146 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129745959","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Fortran: a modern standard programming language for parallel scalable high performance technical computing Fortran:用于并行可伸缩高性能技术计算的现代标准编程语言
1996 Proceedings ICPP Workshop on Challenges for Parallel Processing Pub Date : 1996-08-12 DOI: 10.1109/ICPPW.1996.538600
D. Loveman
{"title":"Fortran: a modern standard programming language for parallel scalable high performance technical computing","authors":"D. Loveman","doi":"10.1109/ICPPW.1996.538600","DOIUrl":"https://doi.org/10.1109/ICPPW.1996.538600","url":null,"abstract":"Fortran is often thought of as an old, archaic programming language that used to be adequate for technical computing but is rapidly being replaced by more modern languages such as C and, especially, C++. No perception could be less accurate. Fortran has been modernized by the standardization process that lead to Fortran 90, and further enhanced with features developed by the High Performance Fortran Forum, many of which have been incorporated in the Fortran 95 draft standard. This modernization makes Fortran the ideal programming language for the development of new technical computing applications or the modernization of legacy codes written in FORTRAN 77. Indeed, since Fortran 90 provides all of the features of FORTRAN 77, initial conversion of a legacy application typically only requires recompilation. This paper provides a quick overview of \"modern\" Fortran for the development of numerically intensive technical computing applications and looks at some simple examples. These examples are chosen to be illustrative of a data parallel coding style that is readable and understandable, performs well on a single processor system, and scales well on multiple processor shared memory and distributed memory systems. Compilers supporting this style of programming are available from a number of vendors.","PeriodicalId":123047,"journal":{"name":"1996 Proceedings ICPP Workshop on Challenges for Parallel Processing","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129953593","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Mechanisms for mapping high-level parallel performance data 用于映射高级并行性能数据的机制
1996 Proceedings ICPP Workshop on Challenges for Parallel Processing Pub Date : 1996-08-12 DOI: 10.1109/ICPPW.1996.538586
R. Irvin, B. Miller
{"title":"Mechanisms for mapping high-level parallel performance data","authors":"R. Irvin, B. Miller","doi":"10.1109/ICPPW.1996.538586","DOIUrl":"https://doi.org/10.1109/ICPPW.1996.538586","url":null,"abstract":"A primary problem in the performance measurement of high-level parallel programming languages is to map low-level events to high-level programming constructs. We discuss several aspects of this problem and present three methods with which performance tools can map performance data and provide accurate performance information to programmers. In particular, we discuss static mapping, dynamic mapping, and a new technique that uses a data structure called the set of active sentences. Because each of these methods requires cooperation between compilers and performance tools, we describe the nature and amount of cooperation required. The three mapping methods are orthogonal; we describe how they should be combined in a complete tool. Although we concentrate on mapping upward through layers of abstraction, our techniques are independent of mapping direction.","PeriodicalId":123047,"journal":{"name":"1996 Proceedings ICPP Workshop on Challenges for Parallel Processing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130394500","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Issues in designing truly scalable interconnection networks 设计真正可扩展互连网络的问题
1996 Proceedings ICPP Workshop on Challenges for Parallel Processing Pub Date : 1996-08-12 DOI: 10.1109/ICPPW.1996.538592
L. Ni
{"title":"Issues in designing truly scalable interconnection networks","authors":"L. Ni","doi":"10.1109/ICPPW.1996.538592","DOIUrl":"https://doi.org/10.1109/ICPPW.1996.538592","url":null,"abstract":"Interconnection networks have been extensively studied in the computer architecture community as they are essential to the performance of parallel processing computing platforms. However, this research area has also been criticized for producing many practically useless research results, which hinder the needed progress in this area. This paper begins with a new classification of interconnection networks and then discusses major practical issues in the design of interconnection networks. The emphasis will be on \"truly scalable\" interconnection networks. A more practical definition of \"incremental scalability\" is elaborated. Just like the evolution of microprocessors, as technology advances, the architecture of interconnection networks may also change. Understanding those technological constraints and performance demands is important to future research in this area.","PeriodicalId":123047,"journal":{"name":"1996 Proceedings ICPP Workshop on Challenges for Parallel Processing","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117352870","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 32
The next frontier: interactive and closed loop performance steering 下一个前沿领域:交互式和闭环性能转向
1996 Proceedings ICPP Workshop on Challenges for Parallel Processing Pub Date : 1996-08-12 DOI: 10.1109/ICPPW.1996.538587
D. Reed, Christopher L. Elford, T. Madhyastha, E. Smirni, Stephen E. Lamm
{"title":"The next frontier: interactive and closed loop performance steering","authors":"D. Reed, Christopher L. Elford, T. Madhyastha, E. Smirni, Stephen E. Lamm","doi":"10.1109/ICPPW.1996.538587","DOIUrl":"https://doi.org/10.1109/ICPPW.1996.538587","url":null,"abstract":"Software for a growing number of problem domains has complex, time varying behavior and unpredictable resource demands (e.g., WWW servers and parallel input/output systems). While current performance analysis tools provide insights into application dynamics and the causes of poor performance, with a posteriori analysis one cannot adapt to temporally varying application resource demands and system responses. We believe that the solution to this performance optimization conundrum is integration of dynamic performance instrumentation and on-the-fly performance data reduction with real-time adaptive control mechanisms that select and configure resource management algorithms automatically, based on observed application behavior, or interactively, through high-modality virtual environments. We motivate this belief by first describing our experiences with performance analysis tools, input/output characterization, and WWW server analysis, and then sketching the design of interactive and closed loop adaptive control systems.","PeriodicalId":123047,"journal":{"name":"1996 Proceedings ICPP Workshop on Challenges for Parallel Processing","volume":"88 10","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120924446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 46
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