{"title":"Specification of real-time systems in real-time temporal interval logic","authors":"K. Narayana, A. A. Aaby","doi":"10.1109/REAL.1988.51104","DOIUrl":"https://doi.org/10.1109/REAL.1988.51104","url":null,"abstract":"A real-time variant of temporal interval logic is proposed for the specification and reasoning of real-time systems. In the framework of the logic, it is possible to specify qualitative and quantitative aspects of temporal behaviors of systems. The formalism provides capabilities for quantitative specification of time behavior. The harmonization of temporal interval logic with real-time features leads to a very-high-level notation for the specification of real-time systems. Temporal interval logic, being event-based, also facilitates the specification of quantitative aspects of temporal behavior relative to the occurrence of events in a given context. The use of the formalism is shown for three examples of real-time system specification: a packet network with rerouting, a traffic-light controller, and a time-constrained broadcast bus protocol.<<ETX>>","PeriodicalId":116211,"journal":{"name":"Proceedings. Real-Time Systems Symposium","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126009162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"State-based specification of complex real-time systems","authors":"A. Gabrielian, M. Franklin","doi":"10.1109/REAL.1988.51095","DOIUrl":"https://doi.org/10.1109/REAL.1988.51095","url":null,"abstract":"A state-based specification methodology for real-time systems is presented that reduces the number of states by orders of magnitude compared to standard techniques and provides explicit representation for temporal constraints. Formal definitions and a graphic notation for the associated hierarchical multistate (HMS) machines are presented, and various concepts of hierarchy of HMS machines are explored. A promising approach to reusability of specifications using generic nondeterministic HMS machines is introduced. Some preliminary results are presented on the formal verification of properties of an HMS machine by (1) extending it to represent requirements as new states and (2) performing reachability analysis on the extended machine to prove the consistency of the requirements with the original specification.<<ETX>>","PeriodicalId":116211,"journal":{"name":"Proceedings. Real-Time Systems Symposium","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132523899","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Implementation and evaluation of a time-driven scheduling processor","authors":"J. W. Wendorf","doi":"10.1109/REAL.1988.51113","DOIUrl":"https://doi.org/10.1109/REAL.1988.51113","url":null,"abstract":"C.D. Locke developed a heuristic, best-effort (BE) time-driven scheduling policy (Ph.D. thesis, Dept. of Comput. Sci., Carnegie-Mellon Univ., (1986)) and demonstrated its superiority to simpler policies using extensive simulations. The author describes an implementation of Locke's BE policy that uses a dedicated scheduling processor to reduce the scheduling overhead significantly. The scheduler was implemented in the Mach operating system kernel, running on a VAX 11/784 multiprocessor. Experimental results under synthetic real-time processing loads of varying intensity show that the high computational overheads of the BE policy make it impractical on a uniprocessor system. Under heavy loads, over 80% of the processors's time can be spent in the scheduler, deciding which task to run next. Using the scheduling processor, less than 2% of the host processor's time is spent in the scheduler.<<ETX>>","PeriodicalId":116211,"journal":{"name":"Proceedings. Real-Time Systems Symposium","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127246072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A real-time tool set for the ARTS kernel","authors":"H. Tokuda, M. Kotera","doi":"10.1109/REAL.1988.51124","DOIUrl":"https://doi.org/10.1109/REAL.1988.51124","url":null,"abstract":"An integrated real-time tool set is described that consists of a schedulability analyzer and a real-time monitor/debugger for the ARTS kernel, which is being built for a distributed real-time testbed. The schedulability analyzer, called Scheduler 1-2-3, is an X11 window-based interactive tool and can verify whether the given real-time tasks can meet their deadlines under a specific scheduling policy. An advanced real-time monitor, ARM, also runs on the X11 window and visualizes the target system's runtime behavior in real time. ARM can be used with Scheduler 1-2-3 to analyze simulated runs and its monitorability.<<ETX>>","PeriodicalId":116211,"journal":{"name":"Proceedings. Real-Time Systems Symposium","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116919130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A real time parallel processing data acquisition system","authors":"N. Wilkinson, M. S. Atkins, J. G. Rogers","doi":"10.1109/REAL.1988.51100","DOIUrl":"https://doi.org/10.1109/REAL.1988.51100","url":null,"abstract":"The design of a VME-based parallel-processing data-acquisition system for the proposed TRIUMF/UBC positron emission tomographs is described. Event records, consisting of eight bytes of data, must be acquired and digitally processed at rates of 250000 to 500000 events per second, corresponding to a data acquisition rate of up to 4 Mb/s. Real-time processing is necessary to reduce the data storage required by half to about 80-90 Mb for a typical patient run, and it also reduces the average data flow and directly reduces the time required for image reconstruction. Real-time data acquisition and processing requirements can be met by about 40 20-MHz Motorola 6820/68881 processors operating asynchronously and in parallel. The authors present the system architecture, the software design, and the hardware design that realizes this very high performance.<<ETX>>","PeriodicalId":116211,"journal":{"name":"Proceedings. Real-Time Systems Symposium","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115714314","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Support for high-priority traffic in VLSI communication switches","authors":"Y. Tamir, Gregory L. Frazier","doi":"10.1109/REAL.1988.51115","DOIUrl":"https://doi.org/10.1109/REAL.1988.51115","url":null,"abstract":"The design of small n*n switches that can be used to construct communication networks that provide low-latency communication for high-priority traffic, which is required for both multistage interconnection networks used in multiprocessors and direct networks used in multicomputers. The focus is on the design of the internal buffers, specifically on the design of buffers that provide non-FIFO handling of messages. Alternative designs and configurations are evaluated in the context of a multistage interconnection network. Simulation shows that a slightly modified version of the recently introduced dynamically allocated multiqueue buffer can provide superior support for high-priority traffic.<<ETX>>","PeriodicalId":116211,"journal":{"name":"Proceedings. Real-Time Systems Symposium","volume":"27 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116346412","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"MELODY: a distributed real-time testbed for adaptive systems","authors":"H. Wedde, G. Alijani, G. Kang, Bo-Kyung Kim","doi":"10.1109/REAL.1988.51107","DOIUrl":"https://doi.org/10.1109/REAL.1988.51107","url":null,"abstract":"The authors analyze current and future needs in building adaptive real-time systems and formulate a series of design requirements for their hardware/interconnection, operating system, and application levels that could be satisfied together only in an integrated system design. They describe the major features of the corresponding model. On the operating-system level, novel services are rendered by their own file system, Dragon Slayer. The file system, in order to both meet real-time constraints and provide for high availability in a hazardous environment, allows for replicating, relocating, or deleting of file copies. A distributed implementation of the integrated system design model is currently being completed in order to serve as a distributed real-time testbed. The authors also report on a sensitivity study that shows how promptly the model file system reacts to changing environmental situations (changing request patterns).<<ETX>>","PeriodicalId":116211,"journal":{"name":"Proceedings. Real-Time Systems Symposium","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121467504","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Real-time synchronization protocols for multiprocessors","authors":"R. Rajkumar, L. Sha, J. Lehoczky","doi":"10.1109/REAL.1988.51121","DOIUrl":"https://doi.org/10.1109/REAL.1988.51121","url":null,"abstract":"The authors investigate the synchronization problem in the context of priority-driven preemptive scheduling on shared-memory multiprocessors. Unfortunately, a direct application of synchronization mechanisms such as the Ada rendezvous, semaphores, or monitors can lead to uncontrolled priority inversion: a high job being blocked by a lower priority job for an indefinite period of time. A task allocation scheme based on the generalized protocol is outlined.<<ETX>>","PeriodicalId":116211,"journal":{"name":"Proceedings. Real-Time Systems Symposium","volume":"2013 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127429684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Expressing and maintaining timing constraints in FLEX","authors":"Kwei-Jay Lin, S. Natarajan","doi":"10.1109/REAL.1988.51105","DOIUrl":"https://doi.org/10.1109/REAL.1988.51105","url":null,"abstract":"The timing constraint mechanism in a real-time programming language called FLEX is described. A FLEX program can use the constraint primitives to express timing and resource requirements. If the required time or resources are not available at run-time, a FLEX program can dynamically produce monotonic imprecise results. Both time and system resources are defined as first-class objects in the language so that they can be evaluated just like any other first-class object. By unifying time, resources, and normal objects, the semantics and the executions of real-time programs are more manageable. Some implementation issues for FLEX are discussed, and some performance data are presented.<<ETX>>","PeriodicalId":116211,"journal":{"name":"Proceedings. Real-Time Systems Symposium","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130468981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On the graceful degradation of phase-locked clocks","authors":"C. M. Krishna, I. Bhandari","doi":"10.1109/REAL.1988.51116","DOIUrl":"https://doi.org/10.1109/REAL.1988.51116","url":null,"abstract":"The use of phase-locked clocks to limit clock skews to fractions of the clock period while keeping the algorithm overhead very small is investigated. The number of clocks in the system required to ensure that up to m arbitrary failures can be tolerated with all the good clocks still in synchrony has been shown to be N>or=3m+1. It is shown here that, if N<or=3m, it is impossible to guarantee even that a small subset of the nonfaulty clocks will always be mutually synchronized, i.e., phase-locked clocks do not necessarily degrade gracefully.<<ETX>>","PeriodicalId":116211,"journal":{"name":"Proceedings. Real-Time Systems Symposium","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115756576","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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