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2009 39th International Symposium on Multiple-Valued Logic最新文献

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An Overview of a Software Tool in Rough Non-deterministic Information Analysis 粗略非确定性信息分析软件工具综述
2009 39th International Symposium on Multiple-Valued Logic Pub Date : 2009-05-21 DOI: 10.1109/ISMVL.2009.15
H. Sakai, Hiroshi Kimura, M. Nakata
{"title":"An Overview of a Software Tool in Rough Non-deterministic Information Analysis","authors":"H. Sakai, Hiroshi Kimura, M. Nakata","doi":"10.1109/ISMVL.2009.15","DOIUrl":"https://doi.org/10.1109/ISMVL.2009.15","url":null,"abstract":"We have been proposing a framework Rough Non-deterministic Information Analysis (RNIA), which handles rough sets based concepts in not only Deterministic Information Systems (DISs) but also Non-deterministic Information Systems (NISs). This paper surveys the overview of RNIA, and clarifies modal logic concepts, i.e., certainty and possibility, or the minimum and the maximum values, for analyzing data tables with non-deterministic information.","PeriodicalId":115178,"journal":{"name":"2009 39th International Symposium on Multiple-Valued Logic","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126478944","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Multiple-Valued Logic Gates Using Asymmetric Single-Electron Transistors 使用非对称单电子晶体管的多值逻辑门
2009 39th International Symposium on Multiple-Valued Logic Pub Date : 2009-05-21 DOI: 10.1109/ISMVL.2009.13
Wancheng Zhang, Nan-Jian Wu, T. Hashizume, S. Kasai
{"title":"Multiple-Valued Logic Gates Using Asymmetric Single-Electron Transistors","authors":"Wancheng Zhang, Nan-Jian Wu, T. Hashizume, S. Kasai","doi":"10.1109/ISMVL.2009.13","DOIUrl":"https://doi.org/10.1109/ISMVL.2009.13","url":null,"abstract":"This paper proposes novel multiple-valued (MV) logic gates by using asymmetric single-electron transistors (SETs). Asymmetric single-electron transistors have two tunneling junctions with largely different resistances and capacitances. We fully exploited the unique Coulomb staircase characteristic of asymmetric SETs to compactly finish logic operations. We build MV literal gates with wide range of radixes by using a pair of asymmetric SETs. We showed that, arbitrary radix-4 literal gate can be realized using a pair of asymmetric SETs. We also proposed MV analog-digital conversion circuits. The MV logic gates have very compact structures and low power dissipation.","PeriodicalId":115178,"journal":{"name":"2009 39th International Symposium on Multiple-Valued Logic","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131988082","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Design of a High-Speed Fuzzy Logic Controller Based on Log-Domain Arithmetic 基于对数域算法的高速模糊控制器设计
2009 39th International Symposium on Multiple-Valued Logic Pub Date : 2009-05-21 DOI: 10.1109/ISMVL.2009.40
Ali Razib, S. Dick, V. Gaudet
{"title":"Design of a High-Speed Fuzzy Logic Controller Based on Log-Domain Arithmetic","authors":"Ali Razib, S. Dick, V. Gaudet","doi":"10.1109/ISMVL.2009.40","DOIUrl":"https://doi.org/10.1109/ISMVL.2009.40","url":null,"abstract":"One of the most important issues for a fast fuzzy-control system is to optimize the defuzzification module that involves computationally expensive multiplication and division operations. This paper introduces a log-domain approach that only requires addition/subtraction, max/min, and look-up table operations to implement a fuzzy controller. The control surfaces of the proposed system are compared to those of traditional fuzzy and PD controllers, and the results are almost the same when a small correction factor is included. For a second-order plant, the log-domain approach offers good step-response characteristics.","PeriodicalId":115178,"journal":{"name":"2009 39th International Symposium on Multiple-Valued Logic","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132627857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
On Periodic Patterns and their Spectra 周期模式及其谱
2009 39th International Symposium on Multiple-Valued Logic Pub Date : 2009-05-21 DOI: 10.1109/ISMVL.2009.37
C. Moraga, R. Stankovic, J. Astola
{"title":"On Periodic Patterns and their Spectra","authors":"C. Moraga, R. Stankovic, J. Astola","doi":"10.1109/ISMVL.2009.37","DOIUrl":"https://doi.org/10.1109/ISMVL.2009.37","url":null,"abstract":"Two-sided spectra of patterns based on classes of orthogonal matrices are introduced and their main properties discussed. In particular, the “mosaicness” of patterns is studied. It is shown that this property of patterns may easily be recognized in the spectral domain, albeit the mosaic structure cannot be unambiguously determined. 2D-Dirichlet kernels based on non-Abelian groups can however be used for a more efficicient analysis of mosaics.","PeriodicalId":115178,"journal":{"name":"2009 39th International Symposium on Multiple-Valued Logic","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125203724","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Floating-Point Numerical Function Generators Using EVMDDs for Monotone Elementary Functions 用EVMDDs生成单调初等函数的浮点数值函数
2009 39th International Symposium on Multiple-Valued Logic Pub Date : 2009-05-21 DOI: 10.1109/ISMVL.2009.24
Shinobu Nagayama, Tsutomu Sasao, J. T. Butler
{"title":"Floating-Point Numerical Function Generators Using EVMDDs for Monotone Elementary Functions","authors":"Shinobu Nagayama, Tsutomu Sasao, J. T. Butler","doi":"10.1109/ISMVL.2009.24","DOIUrl":"https://doi.org/10.1109/ISMVL.2009.24","url":null,"abstract":"This paper proposes a design method for floating-point numerical function generators (NFGs) using multi-valued decision diagrams (MDDs). Our method applies to monotone elementary functions in which real values are converted into integer values that are represented by edge-valued MDDs (EVMDDs). We show that EVMDDs use fewer nodes by one or two orders of magnitude than two other types of decision diagrams, MTBDDs and BMDs. EVMDDs produce fast and compact floating-point NFGs for real-valued elementary functions, with a speed improvement of 86% over a recently proposed floating-point implementation [4].","PeriodicalId":115178,"journal":{"name":"2009 39th International Symposium on Multiple-Valued Logic","volume":"35 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134345431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Optimization of Current-Mode MVD-ORNS Arithmetic Circuits 电流型mvd - orn算法电路的优化
2009 39th International Symposium on Multiple-Valued Logic Pub Date : 2009-05-21 DOI: 10.1109/ISMVL.2009.48
M. Inaba, K. Tanno, R. Sawada, Hisashi Tanaka, H. Tamura
{"title":"Optimization of Current-Mode MVD-ORNS Arithmetic Circuits","authors":"M. Inaba, K. Tanno, R. Sawada, Hisashi Tanaka, H. Tamura","doi":"10.1109/ISMVL.2009.48","DOIUrl":"https://doi.org/10.1109/ISMVL.2009.48","url":null,"abstract":"In this paper, optimization and verification of the current-mode fundamental arithmetic circuits employing MVD-ORNS are presented. MVD-ORNS is the redundant number system using logic levels in the multiple-valued logic. In order to get over weak points of ordinary circuits, the algorithms and circuit components for addition, subtraction and multiplication are reconsidered through the logical analysis and HSPICE simulation with CMOS 0.35 micrometer device parameters. As results in the 4-bit multiplier, the maximum logic level and the number of modulo operations in the series connection are successfully reduced to 29 from 49 and to 2 from 3, respectively. HSPICE simulation also shows the good results, for example the proposed switched current mirrors are very effective to bring both of the stable operation and low power dissipation to the current-mode arithmetic circuits. The proposed MVD-ORNS circuits are expected to realize the high-speed full-parallel calculation without any carry/borrow propagation.","PeriodicalId":115178,"journal":{"name":"2009 39th International Symposium on Multiple-Valued Logic","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122720892","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Quaternary Reed-Muller Expansions of Mixed Radix Arguments in Cryptographic Circuits 密码电路中混合基数参数的四元Reed-Muller展开式
2009 39th International Symposium on Multiple-Valued Logic Pub Date : 2009-05-21 DOI: 10.1109/ISMVL.2009.21
A. Rafiev, Julian P. Murphy, A. Yakovlev
{"title":"Quaternary Reed-Muller Expansions of Mixed Radix Arguments in Cryptographic Circuits","authors":"A. Rafiev, Julian P. Murphy, A. Yakovlev","doi":"10.1109/ISMVL.2009.21","DOIUrl":"https://doi.org/10.1109/ISMVL.2009.21","url":null,"abstract":"Circuits built using multi-valued fixed polarity Reed-Muller expansions based on Galois field arithmetic, in particular quaternary expansions over GF(4), normally display high efficiency in terms of power consumption, area, etc. However, security application specific gate level mapping shows inefficient results for uniform radix expansions. The idea of the research here is to consolidate binary and quaternary Galois field arithmetic within a single circuit in such a way that the mathematical representations can benefit down to the gate level model. A direct method to compute quaternary fixed polarity Reed-Muller expansions of mixed radix arguments is proposed and implemented in a synthesis tool. The results for the various types of power-balanced signal encoding catered for the security application are compared and analysed.","PeriodicalId":115178,"journal":{"name":"2009 39th International Symposium on Multiple-Valued Logic","volume":"289 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122781752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Generalized Extended t-Norms as t-Norms of Type 2 广义扩展t模作为类型2的t模
2009 39th International Symposium on Multiple-Valued Logic Pub Date : 2009-05-21 DOI: 10.1109/ISMVL.2009.63
M. Kawaguchi, M. Miyakoshi
{"title":"Generalized Extended t-Norms as t-Norms of Type 2","authors":"M. Kawaguchi, M. Miyakoshi","doi":"10.1109/ISMVL.2009.63","DOIUrl":"https://doi.org/10.1109/ISMVL.2009.63","url":null,"abstract":"This research work focuses on the logical connectives for type 2 fuzzy logics. Especially, the operators which are obtained by extending continuous t-(co)norms to the case of fuzzy truth values by mean of the generalized extension principle are considered. The authors show that these operators named generalized extended t-(co)norms satisfy the definitions of t-(co)norms of type 2.","PeriodicalId":115178,"journal":{"name":"2009 39th International Symposium on Multiple-Valued Logic","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124386698","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Mining Approximative Descriptions of Sets Using Rough Sets 利用粗糙集挖掘集的近似描述
2009 39th International Symposium on Multiple-Valued Logic Pub Date : 2009-05-21 DOI: 10.1109/ISMVL.2009.18
D. Simovici, Selim Mimaroglu
{"title":"Mining Approximative Descriptions of Sets Using Rough Sets","authors":"D. Simovici, Selim Mimaroglu","doi":"10.1109/ISMVL.2009.18","DOIUrl":"https://doi.org/10.1109/ISMVL.2009.18","url":null,"abstract":"Using concepts from rough set theory we investigate the existence of approximative descriptions of collections of objects that can be extracted from in data set, a problem of interest for biologists that need to find succinct descriptions of families of taxonomic units.  Our algorithm is based on an anti-monotonicity of borders of object set and makes use of an approach that is, ina certain sense, a dual of the Apriori algorithm used inidentifying frequent item sets.","PeriodicalId":115178,"journal":{"name":"2009 39th International Symposium on Multiple-Valued Logic","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126233039","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The Minimal Covering of Maximal Partial Clones in 4-valued Logic 4值逻辑中极大部分克隆的极小覆盖
2009 39th International Symposium on Multiple-Valued Logic Pub Date : 2009-05-21 DOI: 10.1109/ISMVL.2009.33
Karsten Schölzel
{"title":"The Minimal Covering of Maximal Partial Clones in 4-valued Logic","authors":"Karsten Schölzel","doi":"10.1109/ISMVL.2009.33","DOIUrl":"https://doi.org/10.1109/ISMVL.2009.33","url":null,"abstract":"A partial function f on a k-element set Ek is a partial Sheffer function if every partial function on Ek is definable in terms of f. Since this holds if and only if f belongs to no maximal partial clone on Ek, a characterization of partial Sheffer functions reduces to finding families of minimal coverings of maximal partial clones on Ek. It is shown that there is only one minimal covering for k = 4 and it is determined. Additionally all 1 102 coherent relations for k = 4 are given in a full list.","PeriodicalId":115178,"journal":{"name":"2009 39th International Symposium on Multiple-Valued Logic","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126328438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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