{"title":"Towards a generalized theory comprising digital, neuromorphic and unconventional computing","authors":"H. Jaeger","doi":"10.1088/2634-4386/ABF151","DOIUrl":"https://doi.org/10.1088/2634-4386/ABF151","url":null,"abstract":"","PeriodicalId":114772,"journal":{"name":"Neuromorph. Comput. Eng.","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122994704","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Leroux, A. Mizrahi, Danijela Marković, D. Sanz-Hernández, J. Trastoy, P. Bortolotti, L. Martins, A. Jenkins, R. Ferreira, J. Grollier
{"title":"Hardware realization of the multiply and accumulate operation on radio-frequency signals with magnetic tunnel junctions","authors":"N. Leroux, A. Mizrahi, Danijela Marković, D. Sanz-Hernández, J. Trastoy, P. Bortolotti, L. Martins, A. Jenkins, R. Ferreira, J. Grollier","doi":"10.1088/2634-4386/ABFCA6","DOIUrl":"https://doi.org/10.1088/2634-4386/ABFCA6","url":null,"abstract":"Artificial neural networks are a valuable tool for radio-frequency (RF) signal classification in many applications, but digitization of analog signals and the use of general purpose hardware non-optimized for training make the process slow and energetically costly. Recent theoretical work has proposed to use nano-devices called magnetic tunnel junctions, which exhibit intrinsic RF dynamics, to implement in hardware the Multiply and Accumulate (MAC) operation, a key building block of neural networks, directly using analogue RF signals. In this article, we experimentally demonstrate that a magnetic tunnel junction can perform multiplication of RF powers, with tunable positive and negative synaptic weights. Using two magnetic tunnel junctions connected in series we demonstrate the MAC operation and use it for classification of RF signals. These results open the path to embedded systems capable of analyzing RF signals with neural networks directly after the antenna, at low power cost and high speed.","PeriodicalId":114772,"journal":{"name":"Neuromorph. Comput. Eng.","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126703728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mohammad Bavandpour, Shubham Sahay, M. Mahmoodi, D. Strukov
{"title":"3D-aCortex: An Ultra-Compact Energy-Efficient Neurocomputing Platform Based on Commercial 3D-NAND Flash Memories","authors":"Mohammad Bavandpour, Shubham Sahay, M. Mahmoodi, D. Strukov","doi":"10.1088/2634-4386/AC0775","DOIUrl":"https://doi.org/10.1088/2634-4386/AC0775","url":null,"abstract":"The first contribution of this paper is the development of extremely dense, energy-efficient mixed-signal vector-by-matrix-multiplication (VMM) circuits based on the existing 3D-NAND flash memory blocks, without any need for their modification. Such compatibility is achieved using time-domain-encoded VMM design. Our detailed simulations have shown that, for example, the 5-bit VMM of 200-element vectors, using the commercially available 64-layer gate-all-around macaroni-type 3D-NAND memory blocks designed in the 55-nm technology node, may provide an unprecedented area efficiency of 0.14 um2/byte and energy efficiency of ~10 fJ/Op, including the input/output and other peripheral circuitry overheads. Our second major contribution is the development of 3D-aCortex, a multi-purpose neuromorphic inference processor that utilizes the proposed 3D-VMM blocks as its core processing units. We have performed rigorous performance simulations of such a processor on both circuit and system levels, taking into account non-idealities such as drain-induced barrier lowering, capacitive coupling, charge injection, parasitics, process variations, and noise. Our modeling of the 3D-aCortex performing several state-of-the-art neuromorphic-network benchmarks has shown that it may provide the record-breaking storage efficiency of 4.34 MB/mm2, the peak energy efficiency of 70.43 TOps/J, and the computational throughput up to 10.66 TOps/s. The storage efficiency can be further improved seven-fold by aggressively sharing VMM peripheral circuits at the cost of slight decrease in energy efficiency and throughput.","PeriodicalId":114772,"journal":{"name":"Neuromorph. Comput. Eng.","volume":"137 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129448855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}