Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems最新文献_第3页

Modeling Exclusive Memory Access for a Time-Decoupled Parallel SystemC Simulator 时间解耦并行系统模拟器的独占内存访问建模

Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems Pub Date : 2015-06-01 DOI: 10.1145/2764967.2771929

Jan Weinstock, R. Leupers, G. Ascheid

引用次数: 0

A Concept of Vector Clock Utilization in an Iterative Tracing Approach for Distributed Embedded Systems 分布式嵌入式系统迭代跟踪方法中矢量时钟利用的概念

Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems Pub Date : 2015-06-01 DOI: 10.1145/2764967.2764969

Robert Hoettger, B. Igel

{"title":"A Concept of Vector Clock Utilization in an Iterative Tracing Approach for Distributed Embedded Systems","authors":"Robert Hoettger, B. Igel","doi":"10.1145/2764967.2764969","DOIUrl":"https://doi.org/10.1145/2764967.2764969","url":null,"abstract":"Tracing is an inevitable concept for assessing system behavior and optimizing resource utilization in parallel embedded real-time architectures. In the last decades, tracing and trace-recording analysis gained increasing importance due to more complex, computation intense and especially parallel applications spread across a variety of domains. Safety requirements, load balancing, effective memory utilization, product line engineering, heterogeneous targets or demands of common standards are just some of the occurring challenges. Our work addresses iterative system augmentation among models, performance-optimizing features and tracing in order to increase system performance and allow advanced analysis processes. Along with this automatic approach, development results benefit from lower costs and efforts, optimized parallelization, more effective resource utilization and reduced time-to-markets. By replacing a chain of different tools and corresponding manual data transformation and data adaptation with our iterative and comprehensive concept, we provide an advanced, integrated and highly adaptable solution for embedded system development. Furthermore, we illustrate the utilization of vector clocks instead of timestamps for process synchronization and trace analysis. Causal order determination as well as constraint derivation are described among examples and benefits are outlined correspondingly.","PeriodicalId":110157,"journal":{"name":"Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117352415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Toolflow for Parallelization of Embedded Software in Multicore DSP Platforms 一种多核DSP平台嵌入式软件并行化的工具流程

Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems Pub Date : 2015-06-01 DOI: 10.1145/2764967.2771936

M. Aguilar, R. Leupers, G. Ascheid, N. Kavvadias

引用次数: 3

Fast Crown Scheduling Heuristics for Energy-Efficient Mapping and Scaling of Moldable Streaming Tasks on Many-Core Systems 多核系统上可塑流任务节能映射和缩放的快速冠形调度启发式

Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems Pub Date : 2015-01-09 DOI: 10.1145/2764967.2764975

Nicolas Melot, C. Kessler, J. Keller, Patrick Eitschberger

{"title":"Fast Crown Scheduling Heuristics for Energy-Efficient Mapping and Scaling of Moldable Streaming Tasks on Many-Core Systems","authors":"Nicolas Melot, C. Kessler, J. Keller, Patrick Eitschberger","doi":"10.1145/2764967.2764975","DOIUrl":"https://doi.org/10.1145/2764967.2764975","url":null,"abstract":"Exploiting effectively massively parallel architectures is a major challenge that stream programming can help to face. We investigate the problem of generating energy-optimal code for a collection of streaming tasks that include parallelizable or moldable tasks on a generic manycore processor with dynamic discrete frequency scaling. In this paper we consider crown scheduling, a novel technique for the combined optimization of resource allocation, mapping and discrete voltage/frequency scaling for moldable streaming task collections in order to optimize energy efficiency given a throughput constraint. We present optimal off-line algorithms for separate and integrated crown scheduling based on integer linear programming (ILP) and heuristics able to compute solution faster and for bigger problems. We make no restricting assumption about speedup behavior. Our experimental evaluation of the ILP models for a generic manycore architecture shows that at least for small and medium sized streaming task collections even the integrated variant of crown scheduling can be solved to optimality by a state-of-the-art ILP solver within a few seconds. Our heuristics produce makespan and energy consumption close to optimality within the limits of the phase-separated crown scheduling technique and the crown structure. Their optimization time is longer than the one of other algorithms we test, but our heuristics consistently produce better solutions. This is an extended abstract of Melot et al., ACM Trans. Arch. Code Opt. 11(4) 2015.","PeriodicalId":110157,"journal":{"name":"Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121554322","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems 第18届嵌入式系统软件与编译器国际研讨会论文集

Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems Pub Date : 1900-01-01 DOI: 10.1145/2764967

引用次数: 0