{"title":"Design of output dv/dt filter for motor drives","authors":"B. Anirudh Acharya., V. John","doi":"10.1109/ICIINFS.2010.5578641","DOIUrl":"https://doi.org/10.1109/ICIINFS.2010.5578641","url":null,"abstract":"Modern PWM inverter output voltage has high dv/dt, which causes problems such as voltage doubling that can lead to insulation failure, ground currents that results in electromagnetic interference concerns. The IGBT switching device used in such inverter are becoming faster, exacerbating these problems. This paper proposes a new procedure for designing the LC clamp filter. The filter increases the rise time of the output voltage of inverter, resulting in smaller dv/dt. In addition suitable selection of resonance frequency gives LCL filter configuration with improved attenuation. By adding this filter at output terminal of inverter which uses long cable, voltage doubling effect is reduced at the motor terminal. The design procedure is carried out in terms of the power converter based per unit scheme. This generalizes the design procedure to a wide range of power level and to study optimum designs. The effectiveness of the design is verified by computer simulation and experimental measurements.","PeriodicalId":106953,"journal":{"name":"2010 5th International Conference on Industrial and Information Systems","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132328270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A generalized closed form relation for BER of QPSK/M-QAM over fading channel","authors":"Sanjay Singh, M. Sathish Kumar, Mruthyunjaya H S","doi":"10.1109/ICIINFS.2010.5578716","DOIUrl":"https://doi.org/10.1109/ICIINFS.2010.5578716","url":null,"abstract":"The analytical computation of average bit error probability over fading channel is very difficult if the probability of bit error over an AWGN involves square of Gaussian Q function or error function. In this paper curve fitting technique has been applied to represent bit error probability of any digital modulation technique in terms of a simple Gaussian function. Using this approximated function, a generalized closed form relation for computing average probability of error over fading channel has been obtained.","PeriodicalId":106953,"journal":{"name":"2010 5th International Conference on Industrial and Information Systems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117192987","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Routing misbehavior detection and reaction in MANETs","authors":"Ganesh Reddy Karri, P. M. Khilar","doi":"10.1109/ICIINFS.2010.5578729","DOIUrl":"https://doi.org/10.1109/ICIINFS.2010.5578729","url":null,"abstract":"Traditionally, routing protocols for mobile ad-hoc networks (MANETs) assume a safe and a cooperative network setting. In practice, there may be malicious nodes attempt to disrupt the network communication by launching attacks on the routing protocol itself. Protecting the route from malicious attacks is an important yet challenging security issue in mobile ad hoc networks. In this paper, we proposed challenged node technique is to detect and react on the adversary nodes at the route discovery phase. In challenged node technique, any intermediate node new route reply verifies with next hop node challenged replay by its mitigate neighborhood nodes. In essence, new route replay verification algorithm describe about how efficiently it detects the malicious node at route discovery process. Eventually our simulation results are shown that challenged node technique has better malicious node detection probability and packet delivery ratio than existing technique.","PeriodicalId":106953,"journal":{"name":"2010 5th International Conference on Industrial and Information Systems","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124537839","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Energy level performance of multihop wireless sensor networks with correlated interferers","authors":"U. Datta, P. K. Sahu, C. Kundu, S. Kundu","doi":"10.1109/ICIINFS.2010.5578740","DOIUrl":"https://doi.org/10.1109/ICIINFS.2010.5578740","url":null,"abstract":"This paper evaluates the end-to-end performance of a CDMA based static multi-hop wireless sensor network (WSN) in shadowed environment. An interference model for multi-hop is presented using correlated interferers. Three different information delivery mechanisms are studied using regenerative relays with or without error correction capability. Energy requirement for successful delivery of a data packet for each mechanism is evaluated and compared under several conditions of node density, shadowing, correlation, power control error, packet length, and number of hops. The effects of node density, correlation amongst interferers, power control error (pce) and number of hops on over all BER are also investigated. Analytical results are supported by simulation.","PeriodicalId":106953,"journal":{"name":"2010 5th International Conference on Industrial and Information Systems","volume":"117 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115214016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Performance analysis and design of wideband CMOS voltage controlled ring oscillator","authors":"J. K. Panigrahi, D. P. Acharya","doi":"10.1109/ICIINFS.2010.5578701","DOIUrl":"https://doi.org/10.1109/ICIINFS.2010.5578701","url":null,"abstract":"A wide band two stage CMOS voltage controlled ring oscillator (VCRO) based on fully differential delay cells proposed by Yan and Luong has been analyzed. The two stage and three stage VCO circuits are realized using GPDK 90 nm CMOS technology. The design parameters are varied widely and performance of the circuit is evaluated in this work. This scaled VCO has a very wide operating frequency range from 1.22 GHz to 3.22 GHz, which corresponds to a tuning range of 62.11%. Its power consumption is 9.61 mW and the phase noise is about - 90.01 dBc/Hz at 600 kHz offset from 1.74 GHz. The phase noise of the differential VCO is improved by cascading more number of stages at the cost of more power consumption. Three-stage differential delay VCO is implemented and it is observed to achieve - 95.47dBc/Hz of phase noise which is about 6 dB better than the two stage case with better tuning range of 64.23%. However the power consumption of the circuit increases to 14.44 mW.","PeriodicalId":106953,"journal":{"name":"2010 5th International Conference on Industrial and Information Systems","volume":"617 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123201889","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design analysis and performance characteristics of Switched Reluctance Motor","authors":"R. Y. Uday Kumar, A. A. Shaik, K. Deepika","doi":"10.1109/ICIINFS.2010.5578639","DOIUrl":"https://doi.org/10.1109/ICIINFS.2010.5578639","url":null,"abstract":"Switched Reluctance Motor (SRM) is coming up as an alternative selection for variable speed drives in many automobile and industrial application. Its construction is simple and rugged. Its higher efficiency, high torque to inertia ratio and thermal toughness are some of the salient advantages of SRM. However, the SRM has not gained prominent importance in many practical applications, because of its few disadvantages like large torque ripple, acoustic noise and proper design. In this paper, the step by step design procedure of SRM is explained based on the previous literature available, for preliminary design. Finally the over all modifications and validations are carried out using finite element methods. Based on the design validations a proto type has been developed for automobile application. The experimental method verification of the motor winding inductance at different rotor positions from un-aligned to aligned position and, the static flux linkage characteristics are also presented as they play an vital role in design verification and performance calculation of an switched reluctance motors (SRM's). The simulation results are having good conformity with the experimental results.","PeriodicalId":106953,"journal":{"name":"2010 5th International Conference on Industrial and Information Systems","volume":"90 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116669396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Estimation of interconnect metrics using state space approach","authors":"K. Soorya Krishna, M. Pramod, M. S. Bhat","doi":"10.1109/ICIINFS.2010.5578697","DOIUrl":"https://doi.org/10.1109/ICIINFS.2010.5578697","url":null,"abstract":"In this paper, we propose models for single and coupled on-chip global interconnect lines by distributed RLGC parameters using state space approach. Models for single and coupled lines are validated by comparing with SPICE simulations. Interconnect performance metrics are obtained from the proposed models for 65 nm, 90 nm, 130 nm and 180 nm technology nodes based on PTM values. In case of coupled interconnect lines, the effect of mutual inductance and coupling capacitance is considered in addition to the distributed RLGC parameters. The proposed models are generic in nature and illustrated by applying our modeling approach to four coupled interconnect lines.","PeriodicalId":106953,"journal":{"name":"2010 5th International Conference on Industrial and Information Systems","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117047931","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Automatic recognition of facial expressions in image sequences: A review","authors":"R. A. Patil, V. Sahula, A. S. Mandal","doi":"10.1109/ICIINFS.2010.5578670","DOIUrl":"https://doi.org/10.1109/ICIINFS.2010.5578670","url":null,"abstract":"For human beings, facial expression is one of the most powerful and natural way to communicate their emotions and intensions. A human being can detect facial expressions without effort, but for a machine it is very difficult. Automatic facial expression recognition is an interesting and challenging problem. Automatic facial expression recognition systems can be mainly used for human computer interaction and data driven animation. There are three sub problems while designing automatic facial expression recognition system, face detection, extraction of the facial expression information, and classification of the expression. A system that performs these operations more accurately and in real time would be crucial to achieve a human-like interaction between man and machine. This paper reviews the past work done in solving these problems for image sequences.","PeriodicalId":106953,"journal":{"name":"2010 5th International Conference on Industrial and Information Systems","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122050894","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Neural network architectures for time-varying direction-of-arrival estimation","authors":"K. George, Kiran S. Sajjanshetty","doi":"10.1109/ICIINFS.2010.5578731","DOIUrl":"https://doi.org/10.1109/ICIINFS.2010.5578731","url":null,"abstract":"Estimating fixed directions-of-arrival of signals has generally been the objective in the literature. In this paper, however, we are concerned with time-varying directions-of-arrival. We propose here two different architectures of neural networks (feedforward and radial basis function networks) to estimate time-varying directions-of-arrival of signals. These networks are more amenable for hardware implementation compared to the conventional super-resolution techniques. The objective is to use these estimated directions to extract the signals. We demonstrate that neural networks of low complexity achieve our purpose, and the overall system sufficiently robust to account for the inaccuracies in the estimation of directions.","PeriodicalId":106953,"journal":{"name":"2010 5th International Conference on Industrial and Information Systems","volume":"72 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126300819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Exact schedulability analysis of global multi-processor IUF scheduling using symbolic model checking","authors":"A. Lele, A. Kumar, H. Rohith, S. Singh","doi":"10.1109/ICIINFS.2010.5578694","DOIUrl":"https://doi.org/10.1109/ICIINFS.2010.5578694","url":null,"abstract":"Real time scheduling spans a broad spectrum of algorithms for simple uniprocessors to highly sophisticated multiprocessors. As the world nears the end of Moore's Law, more emphasis is being laid on the use of multi-processors in embedded systems. This has lead to a rise in several new scheduling schemes for multi-processor environments. Naturally there arises a need for an accurate comparison of the schedulabilities of each of these schemes in order to prove their superiority over others. The two-fold aim of this paper is to present a technique for the exact schedulability analysis of global multi-processor schedulers and, based on this intermediary result, prove the schedulability superiority of a novel multi-processor scheduling algorithm. The exact schedulability analysis technique presented here is symbolic model checking in NuSMV, and we have used this technique to investigate the schedulability of global Instantaneous Utilization Factor (IUF) based scheduling. Our analysis shows a substantial improvement in the acceptance of task sets with heavier utilizations.","PeriodicalId":106953,"journal":{"name":"2010 5th International Conference on Industrial and Information Systems","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126947380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}