2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia最新文献_第2页

Variability-tolerant workload allocation for MPSoC energy minimization under real-time constraints 实时约束下MPSoC能量最小化的容变工作负载分配

2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia Pub Date : 2009-11-17 DOI: 10.1145/2362336.2362338

Francesco Paterna, A. Acquaviva, Francesco Papariello, G. Desoli, L. Benini

引用次数: 15

A high-performance low-power H.264/AVC video decoder accelerator for embedded systems 用于嵌入式系统的高性能低功耗H.264/AVC视频解码器加速器

2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia Pub Date : 2009-11-17 DOI: 10.1109/ESTMED.2009.5336823

Huang-Chih Kuo, Jian-Wen Chen, Y. Lin

引用次数: 4

Design space exploration for optimal memory mapping of data and instructions in multimedia applications to Scratch-Pad Memories 设计空间探索的最佳存储器映射的数据和指令在多媒体应用的刮擦板存储器

2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia Pub Date : 2009-11-17 DOI: 10.1109/ESTMED.2009.5336826

A. Iranpour, K. Kuchcinski

{"title":"Design space exploration for optimal memory mapping of data and instructions in multimedia applications to Scratch-Pad Memories","authors":"A. Iranpour, K. Kuchcinski","doi":"10.1109/ESTMED.2009.5336826","DOIUrl":"https://doi.org/10.1109/ESTMED.2009.5336826","url":null,"abstract":"In this paper, we propose a new methodology for optimal memory mapping of data and instructions to Scratch-Pad Memories (SPM). In the mapping process, we optimize, as the main priority, the number of memory accesses to minimize power consumption. Minimization of external memory accesses lowers switching activity and therefore power consumption. The optimization is done by finding Pareto-points, using multi-objective optimization that combines different cost functions. Our methodology is intended to be used in real-life situations in industry where there is often a need for mapping third party applications to a specific architecture. For evaluating our methodology, we also use commercial video H.264 and audio eAAC+ applications. Our experiments show that SPM is well suited for these applications for reducing external accesses to reduce power consumption but has limited significance on overall performance improvements. The proposed methodology provides a way to combine SPMs with caches to optimally use this memory architecture. Our experiments indicate high accuracy of our methodology for predicting SPM and external memory accesses. We have obtained 90% accuracy between results of our methodology and results for executing applications on a given architecture.","PeriodicalId":104499,"journal":{"name":"2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122574801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

QoS management of dynamic video tasks by task splitting and skipping 基于任务拆分和跳切的动态视频任务QoS管理

2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia Pub Date : 2009-11-17 DOI: 10.1109/ESTMED.2009.5336827

R. Albers, Eric Suijs, P. D. With

引用次数: 4

A high-throughput, area-efficient hardware accelerator for adaptive deblocking filter in H.264/AVC 一种用于H.264/AVC自适应块化滤波器的高吞吐量、高效率硬件加速器

2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia Pub Date : 2009-11-17 DOI: 10.1109/ESTMED.2009.5336814

M. Nadeem, Stephan Wong, G. Kuzmanov, A. Shabbir

{"title":"A high-throughput, area-efficient hardware accelerator for adaptive deblocking filter in H.264/AVC","authors":"M. Nadeem, Stephan Wong, G. Kuzmanov, A. Shabbir","doi":"10.1109/ESTMED.2009.5336814","DOIUrl":"https://doi.org/10.1109/ESTMED.2009.5336814","url":null,"abstract":"In this paper, we present a high-throughput, area-efficient, hardware accelerator for the deblocking filter in H.264/AVC video compression standard. In order to achieve this goal, we start with algorithmic optimization and propose a novel decomposition of the filter kernels for the deblocking filter. The proposed decomposition reduces the number of adders by 51% and thereby greatly reduces the area requirement for its implementation. Subsequently, at architecture level, while using two identical filtering units, the transpose units are realized by efficient reuse of hardware resources to further reduce the area requirement. The two filtering units process the horizontal and vertical edges of the macro-block simultaneously and therefore further enhance the throughput of the hardware accelerator. Several other optimization techniques, such as reuse of intermediate results, pipelining, and merging of processing blocks on critical path, result in a hardware accelerator for deblocking filter with high throughput at one hand and less area in terms of equivalent gates count on the other, when compared with existing state-of-the-art hardware accelerators in the literature. While working at clock frequency of 166 MHz, synthesized under 0.18 µm CMOS standard cell technology, it easily meets the throughput requirements of all the levels in H.264/AVC video coding standard and consumes only 12.06 K gates (excluding SRAM).","PeriodicalId":104499,"journal":{"name":"2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115666462","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

System-level MP-SoC design space exploration using tree visualization 系统级MP-SoC设计空间探索使用树可视化

2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia Pub Date : 2009-11-17 DOI: 10.1109/ESTMED.2009.5336816

T. Taghavi, A. Pimentel, M. Thompson

引用次数: 9