{"title":"First-Come-First-Served as a Separate Principle","authors":"W. Hesselink, Peter Buhr, Colby A. Parsons","doi":"10.1145/3669989","DOIUrl":"https://doi.org/10.1145/3669989","url":null,"abstract":"A lock is a mechanism to guarantee mutual exclusion with eventual progress, i.e., some degree of fairness. First-come-first-served (FCFS) progress is perfectly fair. FCFS progress can be offered by a locking algorithm or added by wrapping a non-FCFS lock with a separate FCFS algorithm. A new separate FCFS algorithm is presented that creates FCFS progress by wrapping a lock’s entry protocol (acquire). The algorithm addresses an important safety issue in locking, called barging, where arriving threads proceed before waiting threads or waiting threads are serviced with some bias. Barging increases latency for waiting threads and is non-intuitive to concurrent programmers, even though it is inherent to non-deterministic concurrent execution. A correctness proof is presented for the new FCFS algorithm and verified with the proof assistant PVS. Experimental tests are performed to ensure the presented wrapper provides FCFS progress when used to transform non-FCFS software and hardware locks. The performance of the non-FCFS and transformed FCFS counterparts is compared, and contrasted with locks using inherent FCFS progress. The results show the FCFS transforms are performant for most algorithms, providing an additional tool for application developers to achieve correctness without a significant global performance reduction.","PeriodicalId":502233,"journal":{"name":"ACM Transactions on Parallel Computing","volume":" 17","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141670227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Guoqing Xiao, Tao Zhou, Yuedan Chen, Yikun Hu, Kenli Li
{"title":"Machine Learning-Based Kernel Selector for SpMV Optimization in Graph Analysis","authors":"Guoqing Xiao, Tao Zhou, Yuedan Chen, Yikun Hu, Kenli Li","doi":"10.1145/3652579","DOIUrl":"https://doi.org/10.1145/3652579","url":null,"abstract":"\u0000 Sparse Matrix and Vector multiplication (SpMV) is one of the core algorithms in various large-scale scientific computing and real-world applications. With the rapid development of AI and big data, the input vector in SpMV becomes sparse in many application fields. Especially in some graph analysis calculations, the sparsity of the input vector will change with the running of the program, and the non-zero element distribution of the adjacency matrix of some graph data has the power law property, leading to serious load imbalance, which requires additional optimization means. Therefore, the optimal SpMV kernel may be different, and a single SpMV kernel can no longer meet the acceleration requirements. In this paper, we propose a decision tree-based adaptive SpMV framework, named DTSpMV, that can automatically select appropriate SpMV kernels according to different input data in iterations of graph computation. Based on the analysis of computing patterns, bit-array compression algorithms, and serial and parallel algorithms, we encapsulate nine SpMV kernels within the framework. We explore machine learning-based kernel selectors in terms of both accuracy and runtime overhead. Experimental results on NVIDIA Tesla T4 GPU show that our adaptive framework achieves the arithmetic average performance improvement of\u0000 \u0000 (152% )\u0000 \u0000 compared to the SpMV kernel in cuSPARSE.\u0000","PeriodicalId":502233,"journal":{"name":"ACM Transactions on Parallel Computing","volume":"15 11","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140229827","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ziyang Li, Dongsheng Li, Yingwen Chen, Kai Chen, Yiming Zhang
{"title":"Decentralized Scheduling for Data-Parallel Tasks in the Cloud","authors":"Ziyang Li, Dongsheng Li, Yingwen Chen, Kai Chen, Yiming Zhang","doi":"10.1145/3651858","DOIUrl":"https://doi.org/10.1145/3651858","url":null,"abstract":"\u0000 For latency-sensitive data processing applications in the cloud, concurrent data-parallel tasks need to be scheduled and processed quickly. A data-parallel task usually consists of a set of sub-tasks, generating a set of flows that are collectively referred to as\u0000 coflows\u0000 . The state-of-the-art schedulers collect coflow information in the cloud to optimize coflow-level performance. However, most of the coflows, classified as\u0000 small coflows\u0000 because they consist of only short flows, have been largely overlooked. This paper presents\u0000 OptaX\u0000 , a decentralized network scheduling service that collaboratively schedules data-parallel tasks’ small coflows.\u0000 OptaX\u0000 adopts a cross-layer, COTS (commercial off-the-shelf) switch-compatible design that leverages the\u0000 sendbuffer\u0000 information in the kernel to adaptively optimize flow scheduling in the network. Specifically,\u0000 OptaX\u0000 (i) monitors the system calls (syscalls) in the hosts to obtain their\u0000 sendbuffer\u0000 footprints, and (ii) recognizes small coflows and assigns high priorities to their flows.\u0000 OptaX\u0000 transfers these flows in a FIFO manner by adjusting TCP’s two attributes: window size and round-trip time. We have implemented\u0000 OptaX\u0000 as a Linux kernel module. The evaluation shows that\u0000 OptaX\u0000 is at least 2.2 × faster than fair sharing and 1.2 × faster than only assigning small coflows with the highest priority. We further apply\u0000 OptaX\u0000 to improve the small I/O performance of\u0000 Ursa\u0000 , a distributed block storage system that provides virtual disks where small I/O is dominant. URSA with\u0000 OptaX\u0000 achieves significant improvement compared to the original URSA for small I/O latency.\u0000","PeriodicalId":502233,"journal":{"name":"ACM Transactions on Parallel Computing","volume":"80 12","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140236421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Low-Overhead Trace Collection and Profiling on GPU Compute Kernels","authors":"Sébastien Darche, Michel Dagenais","doi":"10.1145/3649510","DOIUrl":"https://doi.org/10.1145/3649510","url":null,"abstract":"While GPUs can bring substantial speedup to compute-intensive tasks, their programming is notoriously hard. From their programming model, to microarchitectural particularities, the programmer may encounter many pitfalls which may hinder performance in obscure ways. Numerous performance analysis tools provide helpful data on the efficiency of the compute kernels, but few allow the programmer to efficiently gather runtime information directly on the device and pinpoint the sections to optimize.\u0000 We propose in this paper an instrumentation method to collect traces while executing the compute kernel, with a reduced overhead compared to other approaches, by exploiting the inherently parallel behavior of GPUs and compartmentalizing tracing phases. The reference implementation is freely available and induces an average overhead of 1.6 × on a popular scientific computing benchmark and 1.5 × over the kernel execution time. This represents an improvement of an order of magnitude compared to similar work, and proves useful for timing-guided optimizations. The tool generates insightful execution traces and timestamps which can be analyzed to better understand performance issues in the kernel.","PeriodicalId":502233,"journal":{"name":"ACM Transactions on Parallel Computing","volume":"453 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140417305","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zixuan Li, Yunchuan Qin, Qi Xiao, Wangdong Yang, Kenli Li
{"title":"cuFasterTucker: A Stochastic Optimization Strategy for Parallel Sparse FastTucker Decomposition on GPU Platform","authors":"Zixuan Li, Yunchuan Qin, Qi Xiao, Wangdong Yang, Kenli Li","doi":"10.1145/3648094","DOIUrl":"https://doi.org/10.1145/3648094","url":null,"abstract":"\u0000 The amount of scientific data is currently growing at an unprecedented pace, with tensors being a common form of data that display high-order, high-dimensional, and sparse features. While tensor-based analysis methods are effective, the vast increase in data size has made processing the original tensor infeasible. Tensor decomposition offers a solution by decomposing the tensor into multiple low-rank matrices or tensors that can be efficiently utilized by tensor-based analysis methods. One such algorithm is the Tucker decomposition, which decomposes an\u0000 N\u0000 -order tensor into\u0000 N\u0000 low-rank factor matrices and a low-rank core tensor. However, many Tucker decomposition techniques generate large intermediate variables and require significant computational resources, rendering them inadequate for processing high-order and high-dimensional tensors. This paper introduces FasterTucker decomposition, a novel approach to tensor decomposition that builds on the FastTucker decomposition, a variant of the Tucker decomposition. We propose an efficient parallel FasterTucker decomposition algorithm, called cuFasterTucker, designed to run on a GPU platform. Our algorithm has low storage and computational requirements and provides an effective solution for high-order and high-dimensional sparse tensor decomposition. Compared to state-of-the-art algorithms, our approach achieves a speedup of approximately 7 to 23 times.\u0000","PeriodicalId":502233,"journal":{"name":"ACM Transactions on Parallel Computing","volume":"58 42","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139961112","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"ABSS: An Adaptive Batch-Stream Scheduling Module for Dynamic Task Parallelism on Chiplet-based Multi-Chip Systems","authors":"Qinyun Cai, Guoqing Xiao, Shengle Lin, Wangdong Yang, Keqin Li, Kenli Li","doi":"10.1145/3643597","DOIUrl":"https://doi.org/10.1145/3643597","url":null,"abstract":"Thanks to the recognition and promotion of chiplet-based High-Performance Computing (HPC) system design technology by semiconductor industry/market leaders, chiplet-based multi-chip systems gradually become the mainstream. Unfortunately, programming such systems to achieve efficient computing is a challenge, especially when considering dynamic task parallelism. This paper presents an Adaptive Batch-Stream Scheduling (ABSS) module for dynamic task parallelism on chiplet-based multi-chip systems. To this end, we propose an adaptive batch-stream scheduling method based on Graph Convolution Network (GCN) classifier to select the appropriate scheduling scheme. We further design a chiplet-based core-cluster binding mechanism, which establishes the affinity between threads and core-clusters on CPU-compute die. Moreover, to achieve dynamic workload balance, we propose a chiplet-based nearest task stealing method. We implement our ABSS module on the HiSilicon Kunpeng-920 chiplet-based multi-chip system. Experiments show that it outperforms state-of-the-art parallelism solutions, such as Intel Threading Building Blocks.","PeriodicalId":502233,"journal":{"name":"ACM Transactions on Parallel Computing","volume":"38 5","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140487727","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modeling and Analyzing Evaluation Cost of CUDA Kernels","authors":"Stefan K. Muller, Jan Hoffmann","doi":"10.1145/3639403","DOIUrl":"https://doi.org/10.1145/3639403","url":null,"abstract":"Motivated by the increasing imporantce of general-purpose GPU (GPGPU) programming, exemplified by NVIDIA’s CUDA framework, as well as the difficulty, especially for novice programmers, of reasoning about performance in GPGPU kernels, we introduce a novel quantitative program logic for CUDA kernels. The logic allows programmers to reason about both functional correctness and resource usage of CUDA kernels, paying particular attention to a set of common but CUDA-specific performance bottlenecks: warp divergences, uncoalesced memory accesses, and bank conflicts. The logic is proved sound with respect to a novel operational cost semantics for CUDA kernels. The semantics, logic and soundness proofs are formalized in Coq. An inference algorithm based on LP solving automatically synthesizes symbolic resource bounds by generating derivations in the logic. This algorithm is the basis of RaCUDA, an end-to-end resource-analysis tool for kernels, which has been implemented using an existing resource-analysis tool for imperative programs. An experimental evaluation on a suite of benchmarks shows that the analysis is effective in aiding the detection of performance bugs in CUDA kernels.","PeriodicalId":502233,"journal":{"name":"ACM Transactions on Parallel Computing","volume":" 5","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-01-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139624623","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}