{"title":"Generation, Validation and Analysis of SPEC CPU2006 Simulation Points Based on Branch, Memory and TLB Characteristics","authors":"K. Ganesan, D. Panwar, L. John","doi":"10.1007/978-3-540-93799-9_8","DOIUrl":"https://doi.org/10.1007/978-3-540-93799-9_8","url":null,"abstract":"","PeriodicalId":397086,"journal":{"name":"SPEC Benchmark Workshop","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-01-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127087429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Darshan Desai, Gerolf Hoflehner, A. Kejariwal, Daniel M. Lavery, A. Nicolau, A. Veidenbaum, Cameron McNairy
{"title":"Performance Characterization of Itanium® 2-Based Montecito Processor","authors":"Darshan Desai, Gerolf Hoflehner, A. Kejariwal, Daniel M. Lavery, A. Nicolau, A. Veidenbaum, Cameron McNairy","doi":"10.1007/978-3-540-93799-9_3","DOIUrl":"https://doi.org/10.1007/978-3-540-93799-9_3","url":null,"abstract":"","PeriodicalId":397086,"journal":{"name":"SPEC Benchmark Workshop","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-01-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129693842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Thermal Design Space Exploration of 3D Die Stacked Multi-core Processors Using Geospatial-Based Predictive Models","authors":"Chang-Burm Cho, Wangyuan Zhang, Tao Li","doi":"10.1007/978-3-540-93799-9_7","DOIUrl":"https://doi.org/10.1007/978-3-540-93799-9_7","url":null,"abstract":"","PeriodicalId":397086,"journal":{"name":"SPEC Benchmark Workshop","volume":"09 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-01-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127229129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Note on the Effects of Service Time Distribution in the M/G/1 Queue","authors":"A. Brandwajn, Thomas Begin","doi":"10.1007/978-3-540-93799-9_9","DOIUrl":"https://doi.org/10.1007/978-3-540-93799-9_9","url":null,"abstract":"","PeriodicalId":397086,"journal":{"name":"SPEC Benchmark Workshop","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-01-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128005797","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Tale of Two Processors: Revisiting the RISC-CISC Debate","authors":"C. Isen, L. John, E. John","doi":"10.1007/978-3-540-93799-9_4","DOIUrl":"https://doi.org/10.1007/978-3-540-93799-9_4","url":null,"abstract":"","PeriodicalId":397086,"journal":{"name":"SPEC Benchmark Workshop","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-01-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124414552","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The Next Frontier for Power/Performance Benchmarking: Energy Efficiency of Storage Subsystems","authors":"K. Lange","doi":"10.1007/978-3-540-93799-9_6","DOIUrl":"https://doi.org/10.1007/978-3-540-93799-9_6","url":null,"abstract":"","PeriodicalId":397086,"journal":{"name":"SPEC Benchmark Workshop","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-01-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128408467","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Investigating Cache Parameters of x86 Family Processors","authors":"V. Babka, P. Tůma","doi":"10.1007/978-3-540-93799-9_5","DOIUrl":"https://doi.org/10.1007/978-3-540-93799-9_5","url":null,"abstract":"","PeriodicalId":397086,"journal":{"name":"SPEC Benchmark Workshop","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-01-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130746362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}