The 25th International Telecommunications Energy Conference, 2003. INTELEC '03.最新文献

Zero-current-transition PWM DC-DC converters using a new zero-current-switching PWM switch cell 零电流转换PWM DC-DC变换器采用一种新的零电流开关PWM开关单元

The 25th International Telecommunications Energy Conference, 2003. INTELEC '03. Pub Date : 2006-07-10 DOI: 10.1049/IP-EPA:20050146

Chien-Ming Wang

引用次数: 11

A non-dissipative reflex charging circuit 一种非耗散反射充电电路

The 25th International Telecommunications Energy Conference, 2003. INTELEC '03. Pub Date : 2005-12-01 DOI: 10.1080/09398368.2005.11463600

Y. Hsieh, C. Moo, Chi-Kang Wu, Jung-Cheng Cheng

引用次数: 13

A Dickson-type power converter with bootstrapped gate transfer switches 带自举门转换开关的迪克逊型功率变换器

The 25th International Telecommunications Energy Conference, 2003. INTELEC '03. Pub Date : 2004-07-01 DOI: 10.1541/IEEJEISS.124.1416

K. Eguchi, Hongbing Zhu, T. Tabata, F. Ueno

{"title":"A Dickson-type power converter with bootstrapped gate transfer switches","authors":"K. Eguchi, Hongbing Zhu, T. Tabata, F. Ueno","doi":"10.1541/IEEJEISS.124.1416","DOIUrl":"https://doi.org/10.1541/IEEJEISS.124.1416","url":null,"abstract":"In this paper, a Dickson-type power converter with bootstrapped gate transfer switches is proposed. The circuit is designed by adding a polarity exchange circuit and N (N = 2, 3, ...) power-switches to the conventional Dickson-type circuit. These additional circuits enable the converter to provide not only a dc-dc output but a dc-ac output. In the process of dc-ac conversion, the circuit can generate various ac outputs by exploiting pulse amplitude modulation (PAM) method. Furthermore, high efficiency can be achieved by adopting novel bootstrap circuits to power-switches in the converter. Via maximum circuits constructed with diodes, the voltage of forward stage is charged to a capacitor in the bootstrap circuit. By connecting the charged-capacitor between the gate terminals of power-switches and the output terminal of the maximum circuit, the bootstrap circuits reduce the on-resistance of the power-switches. The SPICE simulations for the proposed circuit show the following results: 1. the efficiency of dc-dc conversion is more than 90% when the output load Ro = 500 /spl Omega/ and 2. various types of ac outputs can be generated.","PeriodicalId":368746,"journal":{"name":"The 25th International Telecommunications Energy Conference, 2003. INTELEC '03.","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131420235","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Experimental result of multirate deadbeat control for PWM inverter using FPGA based hardware controller 基于FPGA硬件控制器的PWM逆变器多速率无拍控制实验结果

The 25th International Telecommunications Energy Conference, 2003. INTELEC '03. Pub Date : 2004-04-01 DOI: 10.1541/IEEJIAS.124.380

S. Shimogata, M. Horiuchi, T. Yokoyama

{"title":"Experimental result of multirate deadbeat control for PWM inverter using FPGA based hardware controller","authors":"S. Shimogata, M. Horiuchi, T. Yokoyama","doi":"10.1541/IEEJIAS.124.380","DOIUrl":"https://doi.org/10.1541/IEEJIAS.124.380","url":null,"abstract":"A new approach for real time digital feedback control of PWM inverter is proposed, in which a deadbeat control combined with the multirate sampling method is realized using FGPA based hardware controller. The capacity of the output LC filter component occupies ineligible area for the cost performance of the inverter system for the UPS applications. If the capacity of the output LC filter is too small, the output voltage waveforms tends to oscillate between the sampling period when the deadbeat control is applied to the inverter system. In this paper, a novel approach to solve such phenomenon is proposed, which is the deadbeat control method combined with the multirate deadbeat control using FPGA based hardware controller. Deadbeat control ensures the state variables matches at each sampling instant for every sampling period. Also it is reported that the multirate deadbeat control minimizes the tracking error for the reference value. Adopting the multirate deadbeat control, the sampling frequency of the inverter becomes half of the carrier frequency, and it is suitable to implement for higher carrier frequency. Also the FPGA based control hardware enables to realize almost ideal real time feedback controller because of its capability to realize very fast calculation of the control method within a few /spl mu/ second. Design concept and hardware implementation of the FPGA based hardware controller for the PWM inverter is proposed. From the view point of UPS applications, the advantages and the disadvantages are discussed though simulations and experiments, the superiority of the proposed control law is verified.","PeriodicalId":368746,"journal":{"name":"The 25th International Telecommunications Energy Conference, 2003. INTELEC '03.","volume":"181 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132305781","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 14