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FPGA Hardware-Entwurf Pub Date : 2018-06-11 DOI: 10.1515/9783110531459-569
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引用次数: 0
Literaturverzeichnis Literaturverzeichnis
FPGA Hardware-Entwurf Pub Date : 2018-06-11 DOI: 10.1515/9783110531459-561
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引用次数: 0
3. Digitale integrierte Schaltungen 3. 数字集成电路
FPGA Hardware-Entwurf Pub Date : 2018-06-11 DOI: 10.1515/9783110531459-131
{"title":"3. Digitale integrierte Schaltungen","authors":"","doi":"10.1515/9783110531459-131","DOIUrl":"https://doi.org/10.1515/9783110531459-131","url":null,"abstract":"","PeriodicalId":323992,"journal":{"name":"FPGA Hardware-Entwurf","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123417366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
2. Modellierung von digitalen Schaltungen mit VHDL 2. 基于VHDL的数字电路建模
FPGA Hardware-Entwurf Pub Date : 2018-06-11 DOI: 10.1515/9783110531459-033
{"title":"2. Modellierung von digitalen Schaltungen mit VHDL","authors":"","doi":"10.1515/9783110531459-033","DOIUrl":"https://doi.org/10.1515/9783110531459-033","url":null,"abstract":"","PeriodicalId":323992,"journal":{"name":"FPGA Hardware-Entwurf","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123948461","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
1. Einleitung
FPGA Hardware-Entwurf Pub Date : 2018-06-11 DOI: 10.1515/9783110531459-013
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引用次数: 0
Frontmatter
FPGA Hardware-Entwurf Pub Date : 2018-06-11 DOI: 10.1515/9783110531459-fm
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引用次数: 0
6. High-Level Synthese 6. 高层次综合
FPGA Hardware-Entwurf Pub Date : 2018-06-11 DOI: 10.1515/9783110531459-459
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引用次数: 0
5. Physikalische Realisierung und Timing Analyse 5. 现实和时间分析
FPGA Hardware-Entwurf Pub Date : 2018-06-11 DOI: 10.1515/9783110531459-371
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引用次数: 0
4. Von der Register-Transfer-Ebene zur Gatterebene 4. 从县政府转移到城门
FPGA Hardware-Entwurf Pub Date : 2018-06-11 DOI: 10.1515/9783110531459-241
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引用次数: 0
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