Francisco E. Páez, R. Cayssials, J. Urriza, E. Ferro, J. Orozco
{"title":"Frequency domain analysis of a RTOS in control applications","authors":"Francisco E. Páez, R. Cayssials, J. Urriza, E. Ferro, J. Orozco","doi":"10.1109/SASE-CASE.2016.7574097","DOIUrl":"https://doi.org/10.1109/SASE-CASE.2016.7574097","url":null,"abstract":"Control applications are implemented using realtime operating systems. Digital control theory is based on sampling intervals that have to be strictly met in order to get predictable behaviors. However, a real-time system may introduce execution jitters that may cause unpredictable effects on the control application. Stability, overshoot and settling time may be affected when an inadequate real-time system is used. Several papers have proposed different mechanisms to measure the jitter that a real time system produces. However, jitter can not be translated as a performance criterion in control theory. On the other hand, frequency domain techniques are widely applied in control theory for designing control strategies, as well as analyzing and measuring the performance of control mechanisms. In this paper, frequency domain analysis is used to measure the perturbations that a real-time operating system may produce on a control application. Harmonic distortion is defined as a criterion to evaluate the control performance of the the application. Experiments show that higher priority tasks are likely to be used for control tasks since the perturbation produced up to an utilization factor of 70% is adequate for most control applications.","PeriodicalId":267580,"journal":{"name":"2016 Seventh Argentine Conference on Embedded Systems (CASE)","volume":"186 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120971424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"ISVV applied over space embedded software","authors":"Paola Pezoimburu, Federico Lopez, Florencia Rao","doi":"10.1109/SASE-CASE.2016.7574098","DOIUrl":"https://doi.org/10.1109/SASE-CASE.2016.7574098","url":null,"abstract":"In the development of a satellite, there are key subsystems that can be classified as critical to the success of the mission, since a failure in any of them could threat the fulfillment of the objectives of the mission. These subsystems require the application of rigorous verification and validation methodologies in order to ensure a high degree of dependability. This article describes the independent software verification and validation process conducted on the SAR antenna release and deployment system, as part of the development of SAOCOM mission.","PeriodicalId":267580,"journal":{"name":"2016 Seventh Argentine Conference on Embedded Systems (CASE)","volume":"206 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114663004","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Benítez, Yessica Bogado, Ariel Guerrero, M. Arzamendia
{"title":"Development of an UAV prototype for visual inspection of aerial electrical lines","authors":"W. Benítez, Yessica Bogado, Ariel Guerrero, M. Arzamendia","doi":"10.1109/SASE-CASE.2016.7574095","DOIUrl":"https://doi.org/10.1109/SASE-CASE.2016.7574095","url":null,"abstract":"The development of an attitude and altitude control system of an unmanned aerial vehicle for visual inspection of aerial electrical lines is presented. The system was implemented using quaternions algebra and the altimeter equation for the orientation estimation with the purpose of controlling the quadcopter. The proposed system was simulated in Matlab using a Newton-Euler model and compared with the performance on a real prototype operation, obtaining similar results in both cases.","PeriodicalId":267580,"journal":{"name":"2016 Seventh Argentine Conference on Embedded Systems (CASE)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117245006","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Enhancing deterministic in-vehicle networks with a traffic management module","authors":"C. Carrizo, Diego Dujovne","doi":"10.1109/SASE-CASE.2016.7574096","DOIUrl":"https://doi.org/10.1109/SASE-CASE.2016.7574096","url":null,"abstract":"Deterministic communication is currently a fundamental requirement for many real-time systems, such as drive-bywire and autonomous driving solutions; however, in the last few years there has been a sustained increase in the number of other type of on-board connected devices such as actuators, rear vision cameras and multimedia services using different networks on the same vehicle, thus adding weight and complexity. The most efficient solution to this problem is to build a single in-vehicle network to support the delay and bandwidth constraints generated by each type of device. The main goal of this paper is to describe and analyse the performance of a deterministic network management module created to reduce jitter and packet loss, given variable traffic conditions. The most relevant parameters are obtained by simulation work, which permits to establish the actions and policies to execute the prototype modules for this kind of networks.","PeriodicalId":267580,"journal":{"name":"2016 Seventh Argentine Conference on Embedded Systems (CASE)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127357236","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modeling embedded applications: an orderly simplification of finite state automata description","authors":"E. D. Cohen, Esteban Volentini, P. Gruer","doi":"10.1109/SASE-CASE.2016.7574100","DOIUrl":"https://doi.org/10.1109/SASE-CASE.2016.7574100","url":null,"abstract":"This work presents an orderly path for the description and simplification of finite state automata (FSA) representation of embedded systems. This approach takes into account some typical features of this kind of systems, i.e. in a given state of a FSA, usually only a few among a large set of system inputs are taken into account. In addition to this, the system presents identical reaction to many inputs in several states. These and other considerations allow the proposal of a modeling strategy that belongs to the \"divide and conquer\" paradigm.","PeriodicalId":267580,"journal":{"name":"2016 Seventh Argentine Conference on Embedded Systems (CASE)","volume":"114 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133126231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Barella, G. A. Sanca, F. Gomez Marlasca, G. Rodriguez, D. Martelliti, L. Abanto, P. Levy, F. Golmar
{"title":"LabOSat: Low cost measurement platform designed for hazardous environments","authors":"M. Barella, G. A. Sanca, F. Gomez Marlasca, G. Rodriguez, D. Martelliti, L. Abanto, P. Levy, F. Golmar","doi":"10.1109/SASE-CASE.2016.7968107","DOIUrl":"https://doi.org/10.1109/SASE-CASE.2016.7968107","url":null,"abstract":"In this work the characteristics and performance of LabOSat platform to carry out experiments over electronic devices in aggressive environments are described. Configurable, portable, low weight and low cost are the main features. First measurements made in our laboratory are presented before testing in space.","PeriodicalId":267580,"journal":{"name":"2016 Seventh Argentine Conference on Embedded Systems (CASE)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134375828","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
E. Todorovich, Ramiro Carlucho, G. Paoletti, R. Brinks, S. Rossi
{"title":"Breaking the barriers to advanced power management in systems on a chip","authors":"E. Todorovich, Ramiro Carlucho, G. Paoletti, R. Brinks, S. Rossi","doi":"10.1109/SASE-CASE.2016.7574099","DOIUrl":"https://doi.org/10.1109/SASE-CASE.2016.7574099","url":null,"abstract":"Complexity in System on a Chip (SoC) design is rapidly escalating with the advent of more advanced nodes and the ability to integrate 100's of cores on a single die. This highlights the need to understand the power consumption of the device in the early architectural phases of SoC design. The Power Analysis tooling, centered on Network on a chip, and developed as part of this project allows for quick iteration of power management topologies and tradeoffs in power management policies. The approach followed allows for successive iteration and composability of the solution as the design progresses and additional details become available. Flexibility is present in the system to assign both degree of uncertainty and replace the imprecise information with new information as the design process is completed.","PeriodicalId":267580,"journal":{"name":"2016 Seventh Argentine Conference on Embedded Systems (CASE)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115150963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}