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Formal Hardware Verification最新文献

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Design Verification Using Synchronized Transitions 使用同步过渡的设计验证
Formal Hardware Verification Pub Date : 1900-01-01 DOI: 10.1007/3-540-63475-4_3
J. Staunstrup
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引用次数: 1
Verifying VHDL Designs with COSPAN 用COSPAN验证VHDL设计
Formal Hardware Verification Pub Date : 1900-01-01 DOI: 10.1007/3-540-63475-4_5
K. Fisler, R. Kurshan
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引用次数: 15
Appendix: The Common Book Examples 附录:常用书籍示例
Formal Hardware Verification Pub Date : 1900-01-01 DOI: 10.1007/3-540-63475-4_7
T. Kropf
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引用次数: 0
The C@S System C@S系统
Formal Hardware Verification Pub Date : 1900-01-01 DOI: 10.1007/3-540-63475-4_6
K. Schneider, T. Kropf
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引用次数: 2
Symbolic Trajectory Evaluation 符号轨迹评估
Formal Hardware Verification Pub Date : 1900-01-01 DOI: 10.1007/3-540-63475-4_1
S. Hazelhurst, C. Seger
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引用次数: 65
Hardware Verification Using PVS 使用pv进行硬件验证
Formal Hardware Verification Pub Date : 1900-01-01 DOI: 10.1007/3-540-63475-4_4
M. Srivas, H. Ruess, D. Cyrluk
{"title":"Hardware Verification Using PVS","authors":"M. Srivas, H. Ruess, D. Cyrluk","doi":"10.1007/3-540-63475-4_4","DOIUrl":"https://doi.org/10.1007/3-540-63475-4_4","url":null,"abstract":"","PeriodicalId":230071,"journal":{"name":"Formal Hardware Verification","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121612406","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 38
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