Proceedings of The 28th International Workshop on Vertex Detectors — PoS(Vertex2019)最新文献

Low dose rate 60Co facility in Zagreb 低剂量率60Co在萨格勒布的设施

Proceedings of The 28th International Workshop on Vertex Detectors — PoS(Vertex2019) Pub Date : 2020-04-13 DOI: 10.22323/1.373.0066

M. Roguljic, A. Starodumov, A. Karadzhinova-Ferrer, D. Ferencek, A. Ahmed, Luis Miguel Jara-Casas

引用次数: 1

Mechanics, readout and cooling systems of the Mu3e experiment Mu3e实验的力学、读数和冷却系统

Proceedings of The 28th International Workshop on Vertex Detectors — PoS(Vertex2019) Pub Date : 2020-03-24 DOI: 10.22323/1.373.0041

F. M. Aeschbacher, Marin Deflorin, L. Noehte

引用次数: 5

Vertex and Tracking Detectors for the Circular Electron Positron Collider (CEPC) 圆形正电子对撞机(CEPC)的顶点检测器和跟踪检测器

Proceedings of The 28th International Workshop on Vertex Detectors — PoS(Vertex2019) Pub Date : 2020-02-03 DOI: 10.22323/1.373.0046

Hongbo Zhu

{"title":"Vertex and Tracking Detectors for the Circular Electron Positron Collider (CEPC)","authors":"Hongbo Zhu","doi":"10.22323/1.373.0046","DOIUrl":"https://doi.org/10.22323/1.373.0046","url":null,"abstract":"The Circular Electron Positron Collider (CEPC) has been proposed as a Higgs factory to measure the properties of the Higgs boson with high precision and to enable the possibility to explore new physics. To meet the stringent physics requirements, it is necessary to design and construct both vertex and tracking detectors with the state-of-the-art silicon detector technologies. Initial R&D has been focused on CMOS pixel sensors to achieve both high position resolution and low power consumption. They are desirable for the vertex detector, which will sit closest to the interaction point and play a decisive role in precise determination of the primary and secondary vertices that are crucial for heavy flavor tagging. Recently, efforts have been also made to explore the possibility to design the large area silicon tracker with pixel sensors developed with high voltage CMOS technology, which promises both high position resolution and timing resolution. A short stave populated with the latest development of ATLASPix has been proposed for the demonstrator and sensor design tailored toward the CEPC tracker requirements are being pursued.","PeriodicalId":193608,"journal":{"name":"Proceedings of The 28th International Workshop on Vertex Detectors — PoS(Vertex2019)","volume":"2014 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-02-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128023430","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

The ATLAS Hardware Track Trigger design towards first prototypes ATLAS硬件跟踪触发器的第一个原型设计

Proceedings of The 28th International Workshop on Vertex Detectors — PoS(Vertex2019) Pub Date : 2020-02-03 DOI: 10.22323/1.373.0049

S. Dittmeier

{"title":"The ATLAS Hardware Track Trigger design towards first prototypes","authors":"S. Dittmeier","doi":"10.22323/1.373.0049","DOIUrl":"https://doi.org/10.22323/1.373.0049","url":null,"abstract":"For the High-Luminosity LHC, planned to start in 2027, the ATLAS experiment will be equipped with the Hardware Tracking for the Trigger (HTT) system, a dedicated hardware system able to reconstruct tracks in the silicon detectors with low latency. The HTT will be composed of about 700 ATCA boards, based on new technologies available on the market, like high speed links and powerful FPGAs, as well as custom-designed Associative Memory ASICs, which are an evolution of those developed for the ATLAS Fast Tracker. The HTT is designed to cope with the expected extreme high luminosity in the so-called L0-only scenario, where the HTT will operate at the L0 rate (1 MHz). It will provide good quality tracks to the software High- Level-Trigger (HLT), operating as coprocessor to lighten the load of the software tracking. The implementation of the HTT allows the HLT farm size to be reduced by a factor of 10. All ATLAS sub-detector systems are designed also for an evolved, so-called \"L0/L1\", architecture, where part of the HTT is used in a low-latency mode (L1Track), providing tracks in regions of ATLAS at a rate of up to 4 MHz, with a latency of a few micro-seconds. This evolved architecture poses very stringent requirements on the latency budget and to the dataflow rates. All the requirements and the specifications of this system have been assessed. The design of all the components has been reviewed and validated with preliminary simulation studies. Soon, the development of the first prototypes will start. In this paper we describe the status of the HTT design, discuss the challenges and assessed specifications, towards the preparation of the first slice tests with real prototypes.","PeriodicalId":193608,"journal":{"name":"Proceedings of The 28th International Workshop on Vertex Detectors — PoS(Vertex2019)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-02-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128651338","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

The MAPS-based ITS Upgrade for ALICE 基于地图的ALICE ITS升级

Proceedings of The 28th International Workshop on Vertex Detectors — PoS(Vertex2019) Pub Date : 2020-01-09 DOI: 10.22323/1.373.0003

G. Contin

{"title":"The MAPS-based ITS Upgrade for ALICE","authors":"G. Contin","doi":"10.22323/1.373.0003","DOIUrl":"https://doi.org/10.22323/1.373.0003","url":null,"abstract":"The Inner Tracking System (ITS) Upgrade for the ALICE experiment at LHC is the first large-area ($sim$10~m$^2$) silicon vertex detector based on the CMOS Monolithic Active Pixel Sensor (MAPS) technology, which combines sensitive volume and front-end readout logic in the same piece of silicon. This technology allows a reduced material budget (target value of 0.3% on the innermost layers) thanks to the thin sensors (50-100~$mu$m) and limited need of cooling, in combination with light-material interconnection circuits and support structures. The small pixel pitch ($sim$30~$mu$m), the location of the layers (7 cylindrical layers with radii ranging from 2.3~cm to 39.3~cm from the beam interaction line), and the limited material budget will provide the ALICE experiment with extremely precise tracking resolution. The high-rate readout capabilities will also enable ALICE to collect a large data sample at the 50~kHz Pb--Pb collision rate expected in the LHC Run~3. The new ITS, now assembled at the surface, is currently undergoing an exhaustive pre-commissioning phase with standalone calibration and cosmic ray data-taking, which will be completed by April 2020 before the installation in the ALICE detector. Experience gained from the construction and the pre-commissioning phase, and plans for the installation and preparation for the data-taking in ALICE will be presented in this paper. The role played by the new ITS within the development path of the MAPS technology for future applications will also be briefly discussed.","PeriodicalId":193608,"journal":{"name":"Proceedings of The 28th International Workshop on Vertex Detectors — PoS(Vertex2019)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116972958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8