Emerging Technologies: Designing Low Power Digital Systems最新文献

Versatile low voltage low power op-amp design 通用低电压低功率运放设计

Emerging Technologies: Designing Low Power Digital Systems Pub Date : 1996-05-15 DOI: 10.1109/ETLPDS.1996.508869

F. Larsen

{"title":"Versatile low voltage low power op-amp design","authors":"F. Larsen","doi":"10.1109/ETLPDS.1996.508869","DOIUrl":"https://doi.org/10.1109/ETLPDS.1996.508869","url":null,"abstract":"In this chapter we will look at low voltage operational amplifier design from a system level approach. Based on the system and application, the most suitable amplifier structure will change, and we will introduce an architecture that is modular in nature, and thus can easily be modified for a given application. The trade-off between performance and cost will be illustrated with a basic architecture which will be modified to meet various amplifier requirements. All designs were done in a standard CMOS process without low threshold or depletion mode devices. First, a single ended audio driver capable of driving an AC coupled 160 /spl Omega/, 100 pF load to within 0.15 V of the rails with less than 0.02% THD at 3 kHz is presented. This amplifier operates at a supply range from 2.3 to 5.5 V with a quiescent current of 350 /spl mu/A. Next we look at a low noise fully balanced amplifier optimized to drive large capacitive loads at high speeds with a minimum quiescent current, suitable for sampled data systems. This amplifier could drive a 50 pF load at about 35 V//spl mu/-sec /spl plusmn/3 V in a 3.3 V environment with a quiescent current of 450 /spl mu/A. Finally, an input/output rail-to-rail fully balanced amplifier is presented suitable for low noise, audio applications, such as pre-amplifiers, single ended to fully balanced converters, and continuous time filters. Less then 0.003% THD was achieved in the audio range driving a 10 k/spl Omega/, 15 pF load to within 0.1 V of the rails with a quiescent current of 300 /spl mu/A.","PeriodicalId":147168,"journal":{"name":"Emerging Technologies: Designing Low Power Digital Systems","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128213128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

CMOS low-power analog circuit design CMOS低功耗模拟电路设计

Emerging Technologies: Designing Low Power Digital Systems Pub Date : 1996-05-15 DOI: 10.1109/ETLPDS.1996.508872

C. Enz, E. Vittoz

{"title":"CMOS low-power analog circuit design","authors":"C. Enz, E. Vittoz","doi":"10.1109/ETLPDS.1996.508872","DOIUrl":"https://doi.org/10.1109/ETLPDS.1996.508872","url":null,"abstract":"This chapter covers device and circuit aspects of low-power analog CMOS circuit design. The fundamental limits constraining the design of low-power circuits are first recalled with an emphasis on the implications of supply voltage reduction. Biasing MOS transistors at very low current provides new features but requires dedicated models valid in all regions of operation including weak, moderate and strong inversion. Low-current biasing also has a strong influence on noise and matching properties. All these issues are discussed, together with the particular aspects related to passive devices and parasitic effects. The design process has to be supported by efficient and accurate circuit simulation. To this end, the EKV compact MOST model for circuit simulation is presented. The use of the basic concepts such as pinch-off voltage, inversion factor and specific current are highlighted thanks to some very simple but fundamental circuits and to an effective use of the model. New design techniques that are appropriate for low-power and/or low-voltage circuits are presented with an emphasis on the analog floating point technique, the instantaneous companding principle, and their application to filters.","PeriodicalId":147168,"journal":{"name":"Emerging Technologies: Designing Low Power Digital Systems","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130755855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 182

Integrated RF receiver front ends and frequency synthesizers for wireless 集成射频接收器前端和无线频率合成器

Emerging Technologies: Designing Low Power Digital Systems Pub Date : 1900-01-01 DOI: 10.1109/ETLPDS.1996.508877

D. Wilson, W. Rhee, B. Song

引用次数: 7

RF design for wireless 无线射频设计

Emerging Technologies: Designing Low Power Digital Systems Pub Date : 1900-01-01 DOI: 10.1109/ETLPDS.1996.508876

M. Steer

引用次数: 0

Design of integrated MEMs 集成MEMs的设计

Emerging Technologies: Designing Low Power Digital Systems Pub Date : 1900-01-01 DOI: 10.1109/ETLPDS.1996.508874

B. Boser, K. Markus

引用次数: 3

Design of low power digital systems 低功耗数字系统的设计

Emerging Technologies: Designing Low Power Digital Systems Pub Date : 1900-01-01 DOI: 10.1109/ETLPDS.1996.508873

K. Roy, R. Roy, T. Chou

引用次数: 4

Low-power low-voltage VLSI operational amplifier cells 低功率低电压VLSI运算放大器单元

Emerging Technologies: Designing Low Power Digital Systems Pub Date : 1900-01-01 DOI: 10.1109/ETLPDS.1996.508870

J. Huijsing, R. Hogervorst, K.-J. de Langen

引用次数: 119

Theory and design of universal low-voltage opamps 通用低压放大器的原理与设计

Emerging Technologies: Designing Low Power Digital Systems Pub Date : 1900-01-01 DOI: 10.1109/ETLPDS.1996.508871

C. Hwang, A. Motamed, M. Ismail

引用次数: 3

Microsensor engineering 微传感器工程

Emerging Technologies: Designing Low Power Digital Systems Pub Date : 1900-01-01 DOI: 10.1109/ETLPDS.1996.508875

C. Osburn

引用次数: 2

Low power VLSI circuits for mobile communication 用于移动通信的低功耗VLSI电路

Emerging Technologies: Designing Low Power Digital Systems Pub Date : 1900-01-01 DOI: 10.1109/ETLPDS.1996.508878

B. Leung

引用次数: 0