Proceedings of the Workshop on Memory Centric Programming for HPC最新文献

Persistent Memory: The Value to HPC and the Challenges 持久内存:高性能计算的价值和挑战

Proceedings of the Workshop on Memory Centric Programming for HPC Pub Date : 2017-11-12 DOI: 10.1145/3145617.3158213

A. Rudoff

引用次数: 13

Principles of Memory-Centric Programming for High Performance Computing 面向高性能计算的以内存为中心的编程原理

Proceedings of the Workshop on Memory Centric Programming for HPC Pub Date : 2017-11-12 DOI: 10.1145/3145617.3158212

Yonghong Yan, R. Brightwell, Xian-He Sun

{"title":"Principles of Memory-Centric Programming for High Performance Computing","authors":"Yonghong Yan, R. Brightwell, Xian-He Sun","doi":"10.1145/3145617.3158212","DOIUrl":"https://doi.org/10.1145/3145617.3158212","url":null,"abstract":"The memory wall challenge -- the growing disparity between CPU speed and memory speed -- has been one of the most critical and long-standing challenges in computing. For high performance computing, programming to achieve efficient execution of parallel applications often requires more tuning and optimization efforts to improve data and memory access than for managing parallelism. The situation is further complicated by the recent expansion of the memory hierarchy, which is becoming deeper and more diversified with the adoption of new memory technologies and architectures such as 3D-stacked memory, non-volatile random-access memory (NVRAM), and hybrid software and hardware caches. The authors believe it is important to elevate the notion of memory-centric programming, with relevance to the compute-centric or data-centric programming paradigms, to utilize the unprecedented and ever-elevating modern memory systems. Memory-centric programming refers to the notion and techniques of exposing hardware memory system and its hierarchy, which could include DRAM and NUMA regions, shared and private caches, scratch pad, 3-D stacked memory, non-volatile memory, and remote memory, to the programmer via portable programming abstractions and APIs. These interfaces seek to improve the dialogue between programmers and system software, and to enable compiler optimizations, runtime adaptation, and hardware reconguration with regard to data movement, beyond what can be achieved using existing parallel programming APIs. In this paper, we provide an overview of memory-centric programming concepts and principles for high performance computing.","PeriodicalId":131928,"journal":{"name":"Proceedings of the Workshop on Memory Centric Programming for HPC","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124114197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Evaluating GPGPU Memory Performance Through the C-AMAT Model 基于C-AMAT模型的GPGPU内存性能评估

Proceedings of the Workshop on Memory Centric Programming for HPC Pub Date : 2017-11-12 DOI: 10.1145/3145617.3158214

Ning Zhang, Chuntao Jiang, Xian-He Sun, S. Song

引用次数: 6

NUMA Distance for Heterogeneous Memory 异构内存NUMA距离

Proceedings of the Workshop on Memory Centric Programming for HPC Pub Date : 2017-11-12 DOI: 10.1145/3145617.3145620

Sean Williams, Latchesar Ionkov, M. Lang

引用次数: 8

Bit Contiguous Memory Allocation for Processing In Memory 在内存中处理的位连续内存分配

Proceedings of the Workshop on Memory Centric Programming for HPC Pub Date : 2017-11-12 DOI: 10.1145/3145617.3145618

John D. Leidel

{"title":"Bit Contiguous Memory Allocation for Processing In Memory","authors":"John D. Leidel","doi":"10.1145/3145617.3145618","DOIUrl":"https://doi.org/10.1145/3145617.3145618","url":null,"abstract":"Given the recent resurgence of research into processing in or near memory systems, we find an ever increasing need to augment traditional system software tools in order to make efficient use of the PIM hardware abstractions. One such architecture, the Micron In-Memory Intelligence (IMI) DRAM, provides a unique processing capability within the sense amp stride of a traditional 2D DRAM architecture. This accumulator processing circuit has the ability to compute both horizontally and vertically on pitch within the array. This unique processing capability requires a memory allocator that provides physical bit locality in order to ensure numerical consistency. In this work we introduce a new memory allocation methodology that provides bit contiguous allocation mechanisms for horizontal and vertical memory allocations for the Micron IMI DRAM device architecture. Our methodology drastically reduces the complexity by which to find new, unallocated memory blocks by combining a sparse matrix representation of the array with dense continuity vectors that represent the relative probability of finding candidate free blocks. We demonstrate our methodology using a set of pathological and standard benchmark applications in both horizontal and vertical memory modes.","PeriodicalId":131928,"journal":{"name":"Proceedings of the Workshop on Memory Centric Programming for HPC","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128096908","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Beyond 16GB: Out-of-Core Stencil Computations 超过16GB:核外模板计算

Proceedings of the Workshop on Memory Centric Programming for HPC Pub Date : 2017-09-07 DOI: 10.1145/3145617.3145619

Istán Z. Reguly, G. Mudalige, M. Giles

引用次数: 9

Proceedings of the Workshop on Memory Centric Programming for HPC 以记忆体为中心的HPC程式设计研讨会论文集

Proceedings of the Workshop on Memory Centric Programming for HPC Pub Date : 1900-01-01 DOI: 10.1145/3145617

引用次数: 0