Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang最新文献

Structuring Erlang BEAM control flow 构建Erlang BEAM控制流程

Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang Pub Date : 2017-09-08 DOI: 10.1145/3123569.3123572

D. Lukács, M. Tóth

引用次数: 1

The shared-memory interferences of Erlang/OTP built-ins Erlang/OTP内置的共享内存干扰

Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang Pub Date : 2017-09-08 DOI: 10.1145/3123569.3123573

Stavros Aronis, Konstantinos Sagonas

引用次数: 6

Towards an Isabelle/HOL formalisation of core Erlang 走向核心Erlang的Isabelle/HOL形式化

Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang Pub Date : 2017-09-08 DOI: 10.1145/3123569.3123576

J. Harrison

{"title":"Towards an Isabelle/HOL formalisation of core Erlang","authors":"J. Harrison","doi":"10.1145/3123569.3123576","DOIUrl":"https://doi.org/10.1145/3123569.3123576","url":null,"abstract":"As part of broader work to improve the safety of Erlang systems, we are attempting to detect (and prevent) messages which remain forever unreceived in process' mailboxes using a mix of static and runtime analysis. We have formalised the communicating portion of Core Erlang using Isabelle/HOL, an interactive theorem prover. We can use the Isabelle toolchain to prove properties of our model, automatically prepare documents, and generate verified executable code in a variety of functional programming languages. We formally model a communicating fragment of Core Erlang in a language we call CoErl. After defining the evaluation of expressions, we model the process-local and concurrent semantics of the language using a labelled transition system. We also introduce the notion of mailbox traces which capture communication events during process execution. This is followed by some illustrative examples of the concurrent semantics. Although our CoErl model is a solid foundation for a full formalisation of Core Erlang, it currently lacks higher-order and recursive behaviour. Isabelle/HOL has proved practical for formalising and verifying several properties of CoErl and its trace system, while ongoing and future work focuses on bringing the language to feature parity with Core Erlang and Erlang/OTP.","PeriodicalId":106017,"journal":{"name":"Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129327388","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Distributed memory architecture for high-level synthesis of embedded controllers from Erlang 用于Erlang嵌入式控制器高级合成的分布式内存体系结构

Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang Pub Date : 2017-09-08 DOI: 10.1145/3123569.3123574

Kagumi Azuma, N. Ishiura, Nobuaki Yoshida, H. Kanbara

{"title":"Distributed memory architecture for high-level synthesis of embedded controllers from Erlang","authors":"Kagumi Azuma, N. Ishiura, Nobuaki Yoshida, H. Kanbara","doi":"10.1145/3123569.3123574","DOIUrl":"https://doi.org/10.1145/3123569.3123574","url":null,"abstract":"This paper presents a distributed memory architecture for dedicated hardware automatically synthesized from Erlang programs. Our team had developed a framework for generating embedded systems controllers whose behavior was specified by a subset of Erlang, where each process was mapped into hardware (a logic circuit) running independently of the circuits for the other processes. However, the resulting hardware was not of practical use because it shared a single main memory potentially accessed by all the circuits for the processes simultaneously. To address this issue, in this paper, the main memory is partitioned into banks so that each process can access its own memory independently of the other processes. In order to keep the interconnections for message passing to a practical size, a bus architecture is employed where send requests are arbitrated by an arbiter (logic circuit). In order to make the resulting hardware as small as possible, a garbage collection circuit is shared among the circuits for the processes also under the control of the arbiter. From a simple Erlang specification, Verilog HDL codes for necessary hardware to construct a system has been generated.","PeriodicalId":106017,"journal":{"name":"Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132668571","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Construction and formal verification of a fault-tolerant distributed mutual exclusion algorithm 一种容错分布式互斥算法的构造与形式化验证

Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang Pub Date : 2017-09-08 DOI: 10.1145/3123569.3123571

E. Shishkin

{"title":"Construction and formal verification of a fault-tolerant distributed mutual exclusion algorithm","authors":"E. Shishkin","doi":"10.1145/3123569.3123571","DOIUrl":"https://doi.org/10.1145/3123569.3123571","url":null,"abstract":"Distributed fault-tolerant control algorithms are in great demand nowadays due to their practical importance in cloud computing, Internet of Things (IoT) technology, swarm robotics, and other areas. It is usually hard to make a distributed algorithm fault-tolerant. It is even harder to ensure that such algorithm behaves correctly in the presence of faults of some kind. In this work, we construct a reliable, adaptive, fault-tolerant distributed mutual exclusion algorithm based on the well-known Ricart-Agrawala algorithm. In order to formally verify it, we use a hybrid approach of deductive reasoning and bounded model-checking. First, a safety property of the Ricart-Agrawala algorithm is proved in Calculus of Inductive Constructions of Coq proof assistant using assertional reasoning. Then, an extension of that algorithm turning it into fault-tolerant and adaptive to participants set change, is formalized in TLA and checked on a bounded model. Besides constructing and verifying the algorithm, this work aims to familiarize those interested in constructing highly reliable components with well established verification methods that were used to verify the proposed algorithm.","PeriodicalId":106017,"journal":{"name":"Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127948057","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

eAOP: an aspect oriented programming framework for Erlang eAOP:面向方面的Erlang编程框架

Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang Pub Date : 2017-09-08 DOI: 10.1145/3123569.3123570

I. Cassar, Adrian Francalanza, L. Aceto, A. Ingólfsdóttir

引用次数: 9

Towards change-driven testing 朝着变更驱动测试的方向发展

Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang Pub Date : 2017-09-08 DOI: 10.1145/3123569.3123575

Viktória Fördős, István Bozó, M. Tóth

引用次数: 0

Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang 第16届ACM SIGPLAN Erlang国际研讨会论文集

Proceedings of the 16th ACM SIGPLAN International Workshop on Erlang Pub Date : 1900-01-01 DOI: 10.1145/3123569

引用次数: 0