Hongbo Xie , Yincheng Qi , Farah Qasim Ahmed Alyousuf
{"title":"设计一种用于安全纳米通信网络的超高效汉明码产生电路","authors":"Hongbo Xie , Yincheng Qi , Farah Qasim Ahmed Alyousuf","doi":"10.1016/j.micpro.2023.104961","DOIUrl":null,"url":null,"abstract":"<div><p>Communication links forming secure telecommunications networks rely on various technologies such as message switching, circuit switching, or packet switching to transmit messages and data. Hamming codes, a family of linear error-correcting codes, are commonly used in communication networks to detect and correct one-bit and two-bit errors. However, reducing power consumption, occupied area, and latency in secure telecommunication networks remains a challenge for future information and communication technology. To address these challenges, emerging technologies like quantum dots offer potential solutions. Quantum-dot cellular automata (QCA) stands as a promising frontier in nanotechnology for enhancing secure telecommunications networks. It opens up the possibility of crafting high-performance, energy-efficient digital circuits. This research harnesses the potential of QCA and introduces groundbreaking innovations: a 3-8 decoder employing a single-layer layout and a 3-input XOR gate with a multi-layer configuration. These components are utilized in the design of an electronic circuit for Hamming codes, incorporating the QCA-based approach. It is important to note that practical implementation in real-world scenarios presents challenges due to the nature of QCA technology. As a result, the evaluation and validation of the proposed designs heavily rely on simulations using QCADesigner. While experimental validation in real-world scenarios is limited, the simulations provide insights into the functionality and feasibility of the suggested designs. By leveraging QCA, the proposed Hamming code circuit significantly enhances cell count, occupied area, and clock latency. The suggested design can be adapted to fit different generating matrices in Hamming codes without requiring drastic modifications to the underlying architecture.</p></div>","PeriodicalId":49815,"journal":{"name":"Microprocessors and Microsystems","volume":"103 ","pages":"Article 104961"},"PeriodicalIF":1.9000,"publicationDate":"2023-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Designing an ultra-efficient Hamming code generator circuit for a secure nano-telecommunication network\",\"authors\":\"Hongbo Xie , Yincheng Qi , Farah Qasim Ahmed Alyousuf\",\"doi\":\"10.1016/j.micpro.2023.104961\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>Communication links forming secure telecommunications networks rely on various technologies such as message switching, circuit switching, or packet switching to transmit messages and data. Hamming codes, a family of linear error-correcting codes, are commonly used in communication networks to detect and correct one-bit and two-bit errors. However, reducing power consumption, occupied area, and latency in secure telecommunication networks remains a challenge for future information and communication technology. To address these challenges, emerging technologies like quantum dots offer potential solutions. Quantum-dot cellular automata (QCA) stands as a promising frontier in nanotechnology for enhancing secure telecommunications networks. It opens up the possibility of crafting high-performance, energy-efficient digital circuits. This research harnesses the potential of QCA and introduces groundbreaking innovations: a 3-8 decoder employing a single-layer layout and a 3-input XOR gate with a multi-layer configuration. These components are utilized in the design of an electronic circuit for Hamming codes, incorporating the QCA-based approach. It is important to note that practical implementation in real-world scenarios presents challenges due to the nature of QCA technology. As a result, the evaluation and validation of the proposed designs heavily rely on simulations using QCADesigner. While experimental validation in real-world scenarios is limited, the simulations provide insights into the functionality and feasibility of the suggested designs. By leveraging QCA, the proposed Hamming code circuit significantly enhances cell count, occupied area, and clock latency. The suggested design can be adapted to fit different generating matrices in Hamming codes without requiring drastic modifications to the underlying architecture.</p></div>\",\"PeriodicalId\":49815,\"journal\":{\"name\":\"Microprocessors and Microsystems\",\"volume\":\"103 \",\"pages\":\"Article 104961\"},\"PeriodicalIF\":1.9000,\"publicationDate\":\"2023-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microprocessors and Microsystems\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0141933123002053\",\"RegionNum\":4,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microprocessors and Microsystems","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0141933123002053","RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
Designing an ultra-efficient Hamming code generator circuit for a secure nano-telecommunication network
Communication links forming secure telecommunications networks rely on various technologies such as message switching, circuit switching, or packet switching to transmit messages and data. Hamming codes, a family of linear error-correcting codes, are commonly used in communication networks to detect and correct one-bit and two-bit errors. However, reducing power consumption, occupied area, and latency in secure telecommunication networks remains a challenge for future information and communication technology. To address these challenges, emerging technologies like quantum dots offer potential solutions. Quantum-dot cellular automata (QCA) stands as a promising frontier in nanotechnology for enhancing secure telecommunications networks. It opens up the possibility of crafting high-performance, energy-efficient digital circuits. This research harnesses the potential of QCA and introduces groundbreaking innovations: a 3-8 decoder employing a single-layer layout and a 3-input XOR gate with a multi-layer configuration. These components are utilized in the design of an electronic circuit for Hamming codes, incorporating the QCA-based approach. It is important to note that practical implementation in real-world scenarios presents challenges due to the nature of QCA technology. As a result, the evaluation and validation of the proposed designs heavily rely on simulations using QCADesigner. While experimental validation in real-world scenarios is limited, the simulations provide insights into the functionality and feasibility of the suggested designs. By leveraging QCA, the proposed Hamming code circuit significantly enhances cell count, occupied area, and clock latency. The suggested design can be adapted to fit different generating matrices in Hamming codes without requiring drastic modifications to the underlying architecture.
期刊介绍:
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO) is a journal covering all design and architectural aspects related to embedded systems hardware. This includes different embedded system hardware platforms ranging from custom hardware via reconfigurable systems and application specific processors to general purpose embedded processors. Special emphasis is put on novel complex embedded architectures, such as systems on chip (SoC), systems on a programmable/reconfigurable chip (SoPC) and multi-processor systems on a chip (MPSoC), as well as, their memory and communication methods and structures, such as network-on-chip (NoC).
Design automation of such systems including methodologies, techniques, flows and tools for their design, as well as, novel designs of hardware components fall within the scope of this journal. Novel cyber-physical applications that use embedded systems are also central in this journal. While software is not in the main focus of this journal, methods of hardware/software co-design, as well as, application restructuring and mapping to embedded hardware platforms, that consider interplay between software and hardware components with emphasis on hardware, are also in the journal scope.