{"title":"量子点元胞自动机中外部能量或内部细胞缺陷的故障建模","authors":"Debajyoty Banik","doi":"10.1016/j.micpro.2023.104948","DOIUrl":null,"url":null,"abstract":"<div><p>Nanotechnology has made the circuits more susceptible to errors. It takes a lot of space and power to make sequential reversible circuits testable using one of the conventional methods (such as cascading gates with the original circuit). I suggest a superior testing strategy for sequential circuits based on conservative logic. The primary goal of this effort is to create a testable sequential circuit that is compact in terms of circuit area and other cost parameters. My method does not require changing the original circuit. So, incorporating testable features using the proposed method does not affect the complexity of the overall circuit. In this work, stuck-at-fault modeling for external unwanted energy or internal cell defect in low-power molecular QCA is also derived. The reversible double-edge triggered (DET) flip-flop is tested using the suggested approach. The proposed methodology can still be applied to achieve 100% fault coverage for unidirectional stuck-at-fault in quantum cellular automata (QCA) designs. The design is assigned into practice using a layered technique since it is more reliable and economical.</p></div>","PeriodicalId":49815,"journal":{"name":"Microprocessors and Microsystems","volume":"103 ","pages":"Article 104948"},"PeriodicalIF":1.9000,"publicationDate":"2023-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fault modeling for external energy or internal cell defect in quantum dot cellular automata\",\"authors\":\"Debajyoty Banik\",\"doi\":\"10.1016/j.micpro.2023.104948\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>Nanotechnology has made the circuits more susceptible to errors. It takes a lot of space and power to make sequential reversible circuits testable using one of the conventional methods (such as cascading gates with the original circuit). I suggest a superior testing strategy for sequential circuits based on conservative logic. The primary goal of this effort is to create a testable sequential circuit that is compact in terms of circuit area and other cost parameters. My method does not require changing the original circuit. So, incorporating testable features using the proposed method does not affect the complexity of the overall circuit. In this work, stuck-at-fault modeling for external unwanted energy or internal cell defect in low-power molecular QCA is also derived. The reversible double-edge triggered (DET) flip-flop is tested using the suggested approach. The proposed methodology can still be applied to achieve 100% fault coverage for unidirectional stuck-at-fault in quantum cellular automata (QCA) designs. The design is assigned into practice using a layered technique since it is more reliable and economical.</p></div>\",\"PeriodicalId\":49815,\"journal\":{\"name\":\"Microprocessors and Microsystems\",\"volume\":\"103 \",\"pages\":\"Article 104948\"},\"PeriodicalIF\":1.9000,\"publicationDate\":\"2023-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microprocessors and Microsystems\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0141933123001928\",\"RegionNum\":4,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microprocessors and Microsystems","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0141933123001928","RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
Fault modeling for external energy or internal cell defect in quantum dot cellular automata
Nanotechnology has made the circuits more susceptible to errors. It takes a lot of space and power to make sequential reversible circuits testable using one of the conventional methods (such as cascading gates with the original circuit). I suggest a superior testing strategy for sequential circuits based on conservative logic. The primary goal of this effort is to create a testable sequential circuit that is compact in terms of circuit area and other cost parameters. My method does not require changing the original circuit. So, incorporating testable features using the proposed method does not affect the complexity of the overall circuit. In this work, stuck-at-fault modeling for external unwanted energy or internal cell defect in low-power molecular QCA is also derived. The reversible double-edge triggered (DET) flip-flop is tested using the suggested approach. The proposed methodology can still be applied to achieve 100% fault coverage for unidirectional stuck-at-fault in quantum cellular automata (QCA) designs. The design is assigned into practice using a layered technique since it is more reliable and economical.
期刊介绍:
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO) is a journal covering all design and architectural aspects related to embedded systems hardware. This includes different embedded system hardware platforms ranging from custom hardware via reconfigurable systems and application specific processors to general purpose embedded processors. Special emphasis is put on novel complex embedded architectures, such as systems on chip (SoC), systems on a programmable/reconfigurable chip (SoPC) and multi-processor systems on a chip (MPSoC), as well as, their memory and communication methods and structures, such as network-on-chip (NoC).
Design automation of such systems including methodologies, techniques, flows and tools for their design, as well as, novel designs of hardware components fall within the scope of this journal. Novel cyber-physical applications that use embedded systems are also central in this journal. While software is not in the main focus of this journal, methods of hardware/software co-design, as well as, application restructuring and mapping to embedded hardware platforms, that consider interplay between software and hardware components with emphasis on hardware, are also in the journal scope.