采用InP/Al2O3/HfO2 (EOT = 0.8 nm)复合绝缘体的平面Lg = 35 nm In0.7Ga0.3As mosfet

D. Kim, P. Hundal, A. Papavasiliou, P. Chen, C. King, J. Paniagua, M. Urteaga, B. Brar, Y. G. Kim, J. Kuo, J. Li, P. Pinsukanjana, Y. Kao
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引用次数: 16

摘要

我们已经成功地演示了一个三步凹槽工艺来制造高性能的e模平面InGaAs mosfet。我们的器件采用InP/Al2O3/HfO2复合栅绝缘体。当EOT = ~ 0.8 nm时,Lg=35 nm InGaAs MOSFET的VT = 0.17 V, RON = 285 Ohm-μm, DIBL = 135 mV/V, S = 115 mV/dec,色散和迟滞性能可以忽略不计。最重要的是,我们的器件在VDS = 0.5 V时在任何III-V mosfet中显示出gm_max > 2 mS/μm的最大值。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
E-mode planar Lg = 35 nm In0.7Ga0.3As MOSFETs with InP/Al2O3/HfO2 (EOT = 0.8 nm) composite insulator
We have successfully demonstrated a three-step recess process to fabricate high performance E-mode planar InGaAs MOSFETs. Our devices feature a composite gate insulator with InP/Al2O3/HfO2. An Lg=35 nm InGaAs MOSFET with EOT = ~ 0.8 nm exhibits VT = 0.17 V, RON = 285 Ohm-μm, DIBL = 135 mV/V and S = 115 mV/dec, as well as a negligible dispersion and hysteresis behavior. Most importantly, our device displays the highest value of gm_max > 2 mS/μm at VDS = 0.5 V in any III-V MOSFETs.
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