程序和SILC对NC存储器缩放的限制:蒙特卡罗方法

IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest. Pub Date : 2005-12-05 DOI:10.1109/IEDM.2005.1609542

R. Gusmeroli, A. Spinelli, C. Monzio Compagnoni, D. Ielmini, F. Morelli, A. Lacaita

{"title":"程序和SILC对NC存储器缩放的限制:蒙特卡罗方法","authors":"R. Gusmeroli, A. Spinelli, C. Monzio Compagnoni, D. Ielmini, F. Morelli, A. Lacaita","doi":"10.1109/IEDM.2005.1609542","DOIUrl":null,"url":null,"abstract":"We performed 3D Monte Carlo simulations of SOI NAND nanocrystal memories investigating the scaling constraints due to both program failure and reliability concerns. We show that the NC density should be optimized as a trade-off between number fluctuation and SILC immunity and that proper optimization is needed in order to meet the 45 nm ITRS node requirements","PeriodicalId":13071,"journal":{"name":"IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.","volume":"18 1","pages":"1038-1041"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Program and SILC constraints on NC memories scaling: a monte carlo approach\",\"authors\":\"R. Gusmeroli, A. Spinelli, C. Monzio Compagnoni, D. Ielmini, F. Morelli, A. Lacaita\",\"doi\":\"10.1109/IEDM.2005.1609542\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We performed 3D Monte Carlo simulations of SOI NAND nanocrystal memories investigating the scaling constraints due to both program failure and reliability concerns. We show that the NC density should be optimized as a trade-off between number fluctuation and SILC immunity and that proper optimization is needed in order to meet the 45 nm ITRS node requirements\",\"PeriodicalId\":13071,\"journal\":{\"name\":\"IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.\",\"volume\":\"18 1\",\"pages\":\"1038-1041\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2005.1609542\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2005.1609542","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 2

摘要

我们对SOI NAND纳米晶存储器进行了三维蒙特卡罗模拟，研究了由于程序故障和可靠性问题而导致的缩放限制。我们表明NC密度应该作为数字波动和SILC抗扰度之间的权衡进行优化，并且为了满足45 nm ITRS节点的要求，需要适当的优化

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Program and SILC constraints on NC memories scaling: a monte carlo approach

We performed 3D Monte Carlo simulations of SOI NAND nanocrystal memories investigating the scaling constraints due to both program failure and reliability concerns. We show that the NC density should be optimized as a trade-off between number fluctuation and SILC immunity and that proper optimization is needed in order to meet the 45 nm ITRS node requirements

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IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.

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