Jun-Fei Zheng, Philip Chen, Tomas H. Baum, R. Lieten, W. Hunks, S. Lippy, A. Frye, Weimin Li, James O'Neill, Jeff Xu, John Zhu, Jerry Bao, V. Machkaoutsan, M. Badaroglu, G. Yeap, G. Murdoch, J. Bommels, Z. Tokei
{"title":"通过填充物在Cu上选择性co生长","authors":"Jun-Fei Zheng, Philip Chen, Tomas H. Baum, R. Lieten, W. Hunks, S. Lippy, A. Frye, Weimin Li, James O'Neill, Jeff Xu, John Zhu, Jerry Bao, V. Machkaoutsan, M. Badaroglu, G. Yeap, G. Murdoch, J. Bommels, Z. Tokei","doi":"10.1109/IITC-MAM.2015.7325663","DOIUrl":null,"url":null,"abstract":"We report for the first time a highly selective CVD Co deposition on Cu to fill a 45nm diameter 3:1 aspect ratio via in a Cu dual damascene structure. We have achieved void-free Co fill of the via, demonstrating that a selective bottom-up via fill with Co is a potentially viable approach. Defect formation and control in the process and device integration are discussed. This selective process provides an opportunity to reduce via resistance and shrink the minimum metal 1 (M1) area for aggressive standard cell size scaling as needed for 7nm technology.","PeriodicalId":6514,"journal":{"name":"2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM)","volume":"1 1","pages":"265-268"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Selective co growth on Cu for void-free via fill\",\"authors\":\"Jun-Fei Zheng, Philip Chen, Tomas H. Baum, R. Lieten, W. Hunks, S. Lippy, A. Frye, Weimin Li, James O'Neill, Jeff Xu, John Zhu, Jerry Bao, V. Machkaoutsan, M. Badaroglu, G. Yeap, G. Murdoch, J. Bommels, Z. Tokei\",\"doi\":\"10.1109/IITC-MAM.2015.7325663\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report for the first time a highly selective CVD Co deposition on Cu to fill a 45nm diameter 3:1 aspect ratio via in a Cu dual damascene structure. We have achieved void-free Co fill of the via, demonstrating that a selective bottom-up via fill with Co is a potentially viable approach. Defect formation and control in the process and device integration are discussed. This selective process provides an opportunity to reduce via resistance and shrink the minimum metal 1 (M1) area for aggressive standard cell size scaling as needed for 7nm technology.\",\"PeriodicalId\":6514,\"journal\":{\"name\":\"2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM)\",\"volume\":\"1 1\",\"pages\":\"265-268\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-05-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IITC-MAM.2015.7325663\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IITC-MAM.2015.7325663","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We report for the first time a highly selective CVD Co deposition on Cu to fill a 45nm diameter 3:1 aspect ratio via in a Cu dual damascene structure. We have achieved void-free Co fill of the via, demonstrating that a selective bottom-up via fill with Co is a potentially viable approach. Defect formation and control in the process and device integration are discussed. This selective process provides an opportunity to reduce via resistance and shrink the minimum metal 1 (M1) area for aggressive standard cell size scaling as needed for 7nm technology.