用于超cmos逻辑应用的50nm In/sub 0.7/Ga/sub 0.3/As hemt性能评估

Daehyun Kim, J. D. del Alamo, Jaehak Lee, K. Seo
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引用次数: 27

摘要

我们已经研究了纳米级In0.7Ga0.3As hemt作为超cmos应用的高速,低功耗逻辑技术的适用性。为此,我们制作了50- 150nm栅极长度的In0.7Ga0.3As hemt,并采用不同的栅极堆叠设计。50 nm HEMTs表现出离子/IOFF比超过105,DIBL小于90 mV/dec。与最先进的Si mosfet相比,未经优化的50 nm In0.7Ga0.3As hemt提供了等效的高速性能,其直流功耗降低了15倍,等效功耗水平下的fT至少提高了2.7倍。在CMOS技术之外的替代方案中,富含inas的InGaAs hemt具有相当大的前景
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Performance evaluation of 50 nm In/sub 0.7/Ga/sub 0.3/As HEMTs for beyond-CMOS logic applications
We have studied the suitability of nanometer-scale In0.7Ga0.3As HEMTs as a high-speed, low-power logic technology for beyond-CMOS applications. To this end, we have fabricated 50-150 nm gate length In0.7Ga0.3As HEMTs with different gate stack designs. The 50 nm HEMTs exhibit ION/IOFF ratios in excess of 105 and DIBL less than 90 mV/dec. Compared with state-of-the-art Si MOSFETs, the non-optimized 50 nm In0.7Ga0.3As HEMTs provide equivalent highspeed performance with 15 times lower DC power dissipation and at least 2.7 times higher fT at equivalent power dissipation level. In the landscape of alternatives for beyond CMOS technologies, InAs-rich InGaAs HEMTs hold considerable promise
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