{"title":"在不久的将来，高密度和高可靠的3D NAND闪存单元的器件考虑","authors":"Eun-seok Choi, Sung-Kye Park","doi":"10.1109/IEDM.2012.6479011","DOIUrl":null,"url":null,"abstract":"Recently, we have suggested highly manufacturable and reliable 3D NAND flash cell called “SMArT”[1], which is intended to minimize both stack height and word line resistance. Because the storage node of this cell is charge trap nitride, its device characteristics were far different from conventional floating gate. In this paper, the key cell characteristics such as cell Vth distribution, disturbance, and reliability are compared with our FG cell of 2y node in chip level, and several future challenges for 3D era will be addressed.","PeriodicalId":6376,"journal":{"name":"2012 International Electron Devices Meeting","volume":"1 1","pages":"9.4.1-9.4.4"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"88","resultStr":"{\"title\":\"Device considerations for high density and highly reliable 3D NAND flash cell in near future\",\"authors\":\"Eun-seok Choi, Sung-Kye Park\",\"doi\":\"10.1109/IEDM.2012.6479011\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Recently, we have suggested highly manufacturable and reliable 3D NAND flash cell called “SMArT”[1], which is intended to minimize both stack height and word line resistance. Because the storage node of this cell is charge trap nitride, its device characteristics were far different from conventional floating gate. In this paper, the key cell characteristics such as cell Vth distribution, disturbance, and reliability are compared with our FG cell of 2y node in chip level, and several future challenges for 3D era will be addressed.\",\"PeriodicalId\":6376,\"journal\":{\"name\":\"2012 International Electron Devices Meeting\",\"volume\":\"1 1\",\"pages\":\"9.4.1-9.4.4\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"88\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2012.6479011\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2012.6479011","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Device considerations for high density and highly reliable 3D NAND flash cell in near future
Recently, we have suggested highly manufacturable and reliable 3D NAND flash cell called “SMArT”[1], which is intended to minimize both stack height and word line resistance. Because the storage node of this cell is charge trap nitride, its device characteristics were far different from conventional floating gate. In this paper, the key cell characteristics such as cell Vth distribution, disturbance, and reliability are compared with our FG cell of 2y node in chip level, and several future challenges for 3D era will be addressed.
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