Norifumi Sasaoka, Takafumi Ochi, Y. Akiyama, K. Kono, C. Ueda, K. Otsuka
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We are aware that plane power and ground resonance are induced electromagnetic interference (emi) problems due to resonance caused by eddy currents or multiple reflections of voltage fluctuations. a novel technology was used in our previous study only using a conductive layer of dispersed metal particles [4]. The structure is consisted of a conventional fr-4 printed circuit board in which the copper ground plane was replaced with a metal particle conductive layer [4]. This structure improved the pi for any clock frequency especially in GHz region with an impedance of less than 1 Ω. This improvement is verified by an actual 16bit (two set) 3 Gbps/pin i/o interface board in this study. Even though the simultaneous switching of 32 drivers gave a fairly high current slew-rate of (8 mA × 32) / 60 ps = 4.27 × 109 A/s, the pi status was kept at an excellent value within 10% of the Vdd fluctuation.","PeriodicalId":6360,"journal":{"name":"2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)","volume":"2013 1","pages":"55-58"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"New PC board structure for power supply technology over GHz frequency verificated with 32bit SSN driver system\",\"authors\":\"Norifumi Sasaoka, Takafumi Ochi, Y. Akiyama, K. Kono, C. Ueda, K. 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引用次数: 0
摘要
当前电子电路和系统的功率完整性(pi)是GHz时钟领域中最新兴的技术,已经在一些重要的论文中通过几种方法进行了讨论。最佳pi条件的最新概念被认为是在没有任何时钟频率依赖的情况下保持电源和地线或平面之间的较低阻抗,即使在GHz区域。我们在20世纪80年代的一本相对较老的书b[3]中发现了这个概念;因此,这不是最新的想法。然而,它不能完全实现的几个先前提出的方法,包括许多涉及使用低电感电容。我们知道,平面电源和地面共振是由于涡流或电压波动的多重反射引起的共振而引起的感应电磁干扰(emi)问题。我们在之前的研究中使用了一种新技术,仅使用分散金属颗粒[4]的导电层。该结构由传统的fr-4印刷电路板组成,其中铜接地面被金属颗粒导电层[4]取代。这种结构改善了任何时钟频率的pi,特别是在GHz区域阻抗小于1 Ω。本研究通过实际的16位(两组)3 Gbps/pin i/o接口板验证了这一改进。尽管32个驱动器的同时开关产生了相当高的电流变化率(8 mA × 32) / 60 ps = 4.27 × 109 a /s,但pi状态在Vdd波动的10%以内保持在一个很好的值。
New PC board structure for power supply technology over GHz frequency verificated with 32bit SSN driver system
Power integrity (pi) for recent electronics circuits and systems is the most emergent technology in the GHz clock field and has been addressed in important papers through several approaches[1][2]. The latest concept of the best pi condition is recognized as maintaining lower impedance between power and ground lines or planes without any clock frequency dependency, even in the GHz region. We found this concept in a relatively old book [3] from the 1980s; thus, it is not the latest idea. However, it cannot be completely realized by the several previously proposed approaches, including many involving the use of low-inductance capacitances. We are aware that plane power and ground resonance are induced electromagnetic interference (emi) problems due to resonance caused by eddy currents or multiple reflections of voltage fluctuations. a novel technology was used in our previous study only using a conductive layer of dispersed metal particles [4]. The structure is consisted of a conventional fr-4 printed circuit board in which the copper ground plane was replaced with a metal particle conductive layer [4]. This structure improved the pi for any clock frequency especially in GHz region with an impedance of less than 1 Ω. This improvement is verified by an actual 16bit (two set) 3 Gbps/pin i/o interface board in this study. Even though the simultaneous switching of 32 drivers gave a fairly high current slew-rate of (8 mA × 32) / 60 ps = 4.27 × 109 A/s, the pi status was kept at an excellent value within 10% of the Vdd fluctuation.