旋转晶圆上[100]通道应变硅衬底内嵌S/D外延硅的应力诱导新技术

T. Sanuki, H. Tanaka, K. Oota, O. Fujii, R. Yamaguchi, K. Nakayama, Y. Morimasa, Y. Takasu, J. Idebuchi, N. Nishiyama, H. Fukui, H. Yoshimura, K. Matsuo, I. Mizushima, H. Ito, Y. Takegawa, M. Saito, M. Iwai, N. Nagashima, F. Matsuoka
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引用次数: 0

摘要

本文首次提出了一种基于旋转晶圆上lang100range沟道应变si衬底的新型CMOSFET结构。为了抑制高通道掺杂引起的v移和迁移率降低,采用低Ge浓度(10%)的SiGe层。我们在SiGe层的凹槽S/D区进行了Si选择性外延生长,有效地诱导了高拉伸应力,降低了S/D电阻。在应变Si NMOS中,性能提高了15%。此外,使用拉伸型铯离子电池的附加应力可以进一步提高驱动电流。在应变Si PMOS中,窄通道和宽通道器件的性能都提高了25%
本文章由计算机程序翻译,如有差异,请以英文原文为准。
New stress inducing technique of epitaxial si on recessed S/D fabricated in substrate strained-si of [100]channel on rotated wafers
For the first time, a novel CMOSFET structure in substrate strained-Si of lang100rang-channel on rotated wafers is presented. Low Ge concentration (10%) of SiGe layer is used in order to suppress the Vth shift and the mobility reduction caused by high channel doping. We applied Si selective epitaxial growth on recessed S/D region in SiGe layer, which is effective to induce high tensile stress and reduce S/D resistance. In strained Si NMOS, 15% performance improvement is achieved. Moreover, additive stress by using tensile CESL can further improve the drive current. In strained Si PMOS, 25% performance improvement is achieved in both narrow and wide channel device
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