{"title":"提高SMT焊料印刷工艺性能的DMAIC方法","authors":"M.-H.C. Li, Abbas Al-Refaie, Cheng-Yu Yang","doi":"10.1109/TEPM.2008.919342","DOIUrl":null,"url":null,"abstract":"One of the major manufacturing processes of surface-mount technology (SMT) is the solder paste printing process. In this process, the thickness of deposited solder paste on printed circuit board (PCB) pads is a key quality characteristic (QCH) of main concern. In practice, large deviations of solder thickness from a nominal value result in SMT defects that may cause PCB failure. This paper implements the define-measure-analyze-improve-control (DMAIC) approach to improve the capability of the solder paste printing process by reducing thickness variations from a nominal value. Process mapping and identifying key QCH are carried out in the \"define\" phase, while mean x macr and range R control charts followed by the estimates of process capability indices are adopted in the \"measure\" phase. Then, the Taguchi method including L18 orthogonal array (OA), signal-to-noise (S/N) ratio, and analysis of variance (ANOVA) for S/N ratio is implemented in the \"analyze\" phase. Taguchi's two-step optimization is conducted in the \"improve phase.\" Finally, the x macr and R control charts for solder thickness are used in the \"control\" phase. Adopting the DMAIC approach including the Taguchi method, the estimated standard deviation sigma circ of solder thickness is reduced from 13.69 to 6.04, while the process mean is adjusted on 150.1 mum which is very close to the target value of 150 mum. In addition, the process capability index C circpk is enhanced from 0.487 to 1.432.","PeriodicalId":55010,"journal":{"name":"IEEE Transactions on Electronics Packaging Manufacturing","volume":"59 1","pages":"126-133"},"PeriodicalIF":0.0000,"publicationDate":"2008-03-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"83","resultStr":"{\"title\":\"DMAIC Approach to Improve the Capability of SMT Solder Printing Process\",\"authors\":\"M.-H.C. Li, Abbas Al-Refaie, Cheng-Yu Yang\",\"doi\":\"10.1109/TEPM.2008.919342\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"One of the major manufacturing processes of surface-mount technology (SMT) is the solder paste printing process. In this process, the thickness of deposited solder paste on printed circuit board (PCB) pads is a key quality characteristic (QCH) of main concern. In practice, large deviations of solder thickness from a nominal value result in SMT defects that may cause PCB failure. This paper implements the define-measure-analyze-improve-control (DMAIC) approach to improve the capability of the solder paste printing process by reducing thickness variations from a nominal value. Process mapping and identifying key QCH are carried out in the \\\"define\\\" phase, while mean x macr and range R control charts followed by the estimates of process capability indices are adopted in the \\\"measure\\\" phase. Then, the Taguchi method including L18 orthogonal array (OA), signal-to-noise (S/N) ratio, and analysis of variance (ANOVA) for S/N ratio is implemented in the \\\"analyze\\\" phase. Taguchi's two-step optimization is conducted in the \\\"improve phase.\\\" Finally, the x macr and R control charts for solder thickness are used in the \\\"control\\\" phase. Adopting the DMAIC approach including the Taguchi method, the estimated standard deviation sigma circ of solder thickness is reduced from 13.69 to 6.04, while the process mean is adjusted on 150.1 mum which is very close to the target value of 150 mum. In addition, the process capability index C circpk is enhanced from 0.487 to 1.432.\",\"PeriodicalId\":55010,\"journal\":{\"name\":\"IEEE Transactions on Electronics Packaging Manufacturing\",\"volume\":\"59 1\",\"pages\":\"126-133\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-03-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"83\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Electronics Packaging Manufacturing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TEPM.2008.919342\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electronics Packaging Manufacturing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEPM.2008.919342","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 83
摘要
表面贴装技术(SMT)的主要制造工艺之一是焊膏印刷工艺。在此过程中,印制电路板(PCB)焊盘上沉积锡膏的厚度是主要关注的关键质量特性(QCH)。在实践中,焊料厚度与标称值的较大偏差会导致SMT缺陷,从而可能导致PCB失效。本文实现了定义-测量-分析-改进-控制(DMAIC)方法,通过减少标称值的厚度变化来提高锡膏印刷过程的能力。在“定义”阶段进行过程映射和识别关键QCH,在“测量”阶段采用mean x macr和range R控制图,然后对过程能力指标进行估计。然后,在“分析”阶段实现了包括L18正交阵列(OA)、信噪比(S/N)和信噪比方差分析(ANOVA)在内的田口法。田口的两步优化是在“改进阶段”进行的。最后,在“控制”阶段使用焊料厚度的x macr和R控制图。采用包括田口法在内的DMAIC方法,将焊料厚度的估计标准差sigma circ从13.69降低到6.04,而将工艺平均值调整为150.1 mum,非常接近目标值150 mum。加工能力指数C circpk由0.487提高到1.432。
DMAIC Approach to Improve the Capability of SMT Solder Printing Process
One of the major manufacturing processes of surface-mount technology (SMT) is the solder paste printing process. In this process, the thickness of deposited solder paste on printed circuit board (PCB) pads is a key quality characteristic (QCH) of main concern. In practice, large deviations of solder thickness from a nominal value result in SMT defects that may cause PCB failure. This paper implements the define-measure-analyze-improve-control (DMAIC) approach to improve the capability of the solder paste printing process by reducing thickness variations from a nominal value. Process mapping and identifying key QCH are carried out in the "define" phase, while mean x macr and range R control charts followed by the estimates of process capability indices are adopted in the "measure" phase. Then, the Taguchi method including L18 orthogonal array (OA), signal-to-noise (S/N) ratio, and analysis of variance (ANOVA) for S/N ratio is implemented in the "analyze" phase. Taguchi's two-step optimization is conducted in the "improve phase." Finally, the x macr and R control charts for solder thickness are used in the "control" phase. Adopting the DMAIC approach including the Taguchi method, the estimated standard deviation sigma circ of solder thickness is reduced from 13.69 to 6.04, while the process mean is adjusted on 150.1 mum which is very close to the target value of 150 mum. In addition, the process capability index C circpk is enhanced from 0.487 to 1.432.